feat(plat/nxp/common): add SecMon register definition for ch_3_2

Add SecMon register definition for ch_3_2.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I80d134ea4e94ad234e1a8fbd02798d5fd86d2544
This commit is contained in:
Jiafei Pan 2021-09-10 19:13:27 +08:00
parent 6c5d140ed9
commit 66f7884b52
1 changed files with 4 additions and 0 deletions

View File

@ -39,6 +39,10 @@
#endif /* NXP_RESET_ADDR */
/* secmon register offsets and bitfields */
#define SECMON_HPCOMR_OFFSET 0x4
#define SECMON_HPCOMR_NPSWAEN 0x80000000
/* Secure-Register-File register offsets and bit masks */
#ifdef NXP_RST_ADDR
/* Register Offset */