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Merge pull request #1313 from jonathanwright-ARM/jw/MISRA-switch-statements 

Fix switch statements to comply with MISRA rules
This commit is contained in:
Dimitris Papastamos 2018-03-29 13:20:05 +01:00 committed by GitHub
parent 875a85aae6 185a23ffa3
commit 6ab136c258
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
32 changed files with 103 additions and 87 deletions
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2
bl1/bl1_fwu.c
View File

@ -87,6 +87,7 @@ register_t bl1_fwu_smc_handler(unsigned int smc_fid,
case FWU_SMC_UPDATE_DONE:
bl1_fwu_done((void *)x1, NULL);
/* We should never return from bl1_fwu_done() */
break;
default:
assert(0);
@ -747,6 +748,7 @@ static int bl1_fwu_image_reset(unsigned int image_id, unsigned int flags)
case IMAGE_STATE_EXECUTED:
default:
assert(0);
break;
}
return 0;

23
drivers/arm/cci/cci.c
View File

@ -83,22 +83,25 @@ static unsigned int read_cci_part_number(uintptr_t base)
*/
static int get_slave_ports(unsigned int part_num)
{
/* Macro to match CCI products */
#define RET_ON_MATCH(product) \
case CCI ## product ## _PART_NUM: \
return CCI ## product ## _SLAVE_PORTS
int num_slave_ports = -1;
switch (part_num) {
RET_ON_MATCH(400);
RET_ON_MATCH(500);
RET_ON_MATCH(550);
case CCI400_PART_NUM:
num_slave_ports = CCI400_SLAVE_PORTS;
break;
case CCI500_PART_NUM:
num_slave_ports = CCI500_SLAVE_PORTS;
break;
case CCI550_PART_NUM:
num_slave_ports = CCI550_SLAVE_PORTS;
break;
default:
return -1;
/* Do nothing in default case */
break;
}
#undef RET_ON_MATCH
return num_slave_ports;
}
#endif /* ENABLE_ASSERTIONS */

1
drivers/arm/gic/v2/gicv2_main.c
View File

@ -459,6 +459,7 @@ void gicv2_set_interrupt_type(unsigned int id, unsigned int type)
break;
default:
assert(0);
break;
}
spin_unlock(&gic_lock);
}

1
drivers/arm/gic/v3/gicv3_main.c
View File

@ -1004,6 +1004,7 @@ void gicv3_set_interrupt_type(unsigned int id, unsigned int proc_num,
break;
default:
assert(0);
break;
}
if (id < MIN_SPI_ID) {

1
drivers/synopsys/emmc/dw_mmc.c
View File

@ -321,6 +321,7 @@ static int dw_set_ios(int clk, int width)
break;
default:
assert(0);
break;
}
dw_set_clk(clk);
return 0;

8
drivers/ufs/ufs.c
View File

@ -271,6 +271,7 @@ static int ufs_prepare_cmd(utp_utrd_t *utrd, uint8_t op, uint8_t lun,
break;
default:
assert(0);
break;
}
if (hd->dd == DD_IN)
flush_dcache_range(buf, length);
@ -359,6 +360,7 @@ static int ufs_prepare_query(utp_utrd_t *utrd, uint8_t op, uint8_t idn,
break;
default:
assert(0);
break;
}
flush_dcache_range((uintptr_t)utrd, sizeof(utp_utrd_t));
flush_dcache_range((uintptr_t)utrd->header, UFS_DESC_SIZE);
@ -511,6 +513,9 @@ static void ufs_query(uint8_t op, uint8_t idn, uint8_t index, uint8_t sel,
case QUERY_WRITE_ATTR:
assert(((buf & 3) == 0) && (size != 0));
break;
default:
/* Do nothing in default case */
break;
}
get_utrd(&utrd);
ufs_prepare_query(&utrd, op, idn, index, sel, buf, size);
@ -533,6 +538,9 @@ static void ufs_query(uint8_t op, uint8_t idn, uint8_t index, uint8_t sel,
(void *)(utrd.resp_upiu + sizeof(query_resp_upiu_t)),
size);
break;
default:
/* Do nothing in default case */
break;
}
(void)result;
}

4
include/lib/pmf/pmf.h
View File

@ -37,8 +37,8 @@
/*
* Defines for PMF SMC function ids.
*/
#define PMF_SMC_GET_TIMESTAMP_32 0x82000010
#define PMF_SMC_GET_TIMESTAMP_64 0xC2000010
#define PMF_SMC_GET_TIMESTAMP_32 0x82000010u
#define PMF_SMC_GET_TIMESTAMP_64 0xC2000010u
#define PMF_NUM_SMC_CALLS 2
/*

12
lib/pmf/pmf_smc.c
View File

@ -30,8 +30,7 @@ uintptr_t pmf_smc_handler(unsigned int smc_fid,
x2 = (uint32_t)x2;
x3 = (uint32_t)x3;
switch (smc_fid) {
case PMF_SMC_GET_TIMESTAMP_32:
if (smc_fid == PMF_SMC_GET_TIMESTAMP_32) {
/*
* Return error code and the captured
* time-stamp to the caller.
@ -41,13 +40,9 @@ uintptr_t pmf_smc_handler(unsigned int smc_fid,
rc = pmf_get_timestamp_smc(x1, x2, x3, &ts_value);
SMC_RET3(handle, rc, (uint32_t)ts_value,
(uint32_t)(ts_value >> 32));
default:
break;
}
} else {
switch (smc_fid) {
case PMF_SMC_GET_TIMESTAMP_64:
if (smc_fid == PMF_SMC_GET_TIMESTAMP_64) {
/*
* Return error code and the captured
* time-stamp to the caller.
@ -56,9 +51,6 @@ uintptr_t pmf_smc_handler(unsigned int smc_fid,
*/
rc = pmf_get_timestamp_smc(x1, x2, x3, &ts_value);
SMC_RET2(handle, rc, ts_value);
default:
break;
}
}

2
lib/psci/psci_main.c
View File

@ -414,10 +414,12 @@ u_register_t psci_smc_handler(uint32_t smc_fid,
case PSCI_SYSTEM_OFF:
psci_system_off();
/* We should never return from psci_system_off() */
break;
case PSCI_SYSTEM_RESET:
psci_system_reset();
/* We should never return from psci_system_reset() */
break;
case PSCI_FEATURES:
return psci_features(x1);

8
plat/arm/board/fvp/fvp_pm.c
View File

@ -324,13 +324,11 @@ static int fvp_node_hw_state(u_register_t target_cpu,
if (psysr == PSYSR_INVALID)
return PSCI_E_INVALID_PARAMS;
switch (power_level) {
case ARM_PWR_LVL0:
if (power_level == ARM_PWR_LVL0) {
ret = (psysr & PSYSR_AFF_L0) ? HW_ON : HW_OFF;
break;
case ARM_PWR_LVL1:
} else {
/* power_level == ARM_PWR_LVL1 */
ret = (psysr & PSYSR_AFF_L1) ? HW_ON : HW_OFF;
break;
}
return ret;

3
plat/arm/common/arm_bl2_setup.c
View File

@ -305,6 +305,9 @@ int arm_bl2_handle_post_image_load(unsigned int image_id)
}
break;
#endif
default:
/* Do nothing in default case */
break;
}
return err;

12
plat/common/plat_gicv2.c
View File

@ -190,6 +190,8 @@ void plat_ic_set_interrupt_priority(unsigned int id, unsigned int priority)
int plat_ic_has_interrupt_type(unsigned int type)
{
int has_interrupt_type = 0;
switch (type) {
#if GICV2_G0_FOR_EL3
case INTR_TYPE_EL3:
@ -197,10 +199,14 @@ int plat_ic_has_interrupt_type(unsigned int type)
case INTR_TYPE_S_EL1:
#endif
case INTR_TYPE_NS:
return 1;
has_interrupt_type = 1;
break;
default:
return 0;
/* Do nothing in default case */
break;
}
return has_interrupt_type;
}
void plat_ic_set_interrupt_type(unsigned int id, unsigned int type)
@ -221,6 +227,7 @@ void plat_ic_set_interrupt_type(unsigned int id, unsigned int type)
break;
default:
assert(0);
break;
}
gicv2_set_interrupt_type(id, gicv2_type);
@ -260,6 +267,7 @@ void plat_ic_set_spi_routing(unsigned int id, unsigned int routing_mode,
break;
default:
assert(0);
break;
}
gicv2_set_spi_routing(id, proc_num);

6
plat/common/plat_gicv3.c
View File

@ -158,15 +158,14 @@ uint32_t plat_interrupt_type_to_line(uint32_t type,
return __builtin_ctz(SCR_FIQ_BIT);
else
return __builtin_ctz(SCR_IRQ_BIT);
default:
assert(0);
/* Fall through in the release build */
case INTR_TYPE_EL3:
/*
* The EL3 interrupts are signaled as FIQ in both S-EL0/1 and
* NS-EL0/1/2 contexts
*/
return __builtin_ctz(SCR_FIQ_BIT);
default:
panic();
}
}
@ -248,6 +247,7 @@ void plat_ic_set_spi_routing(unsigned int id, unsigned int routing_mode,
break;
default:
assert(0);
break;
}
gicv3_set_spi_routing(id, irm, mpidr);

3
plat/hisilicon/hikey/hikey_bl2_setup.c
View File

@ -175,6 +175,9 @@ int hikey_bl2_handle_post_image_load(unsigned int image_id)
}
break;
#endif
default:
/* Do nothing in default case */
break;
}
return err;

3
plat/hisilicon/hikey960/hikey960_bl2_setup.c
View File

@ -267,6 +267,9 @@ int hikey960_bl2_handle_post_image_load(unsigned int image_id)
}
break;
#endif
default:
/* Do nothing in default case */
break;
}
return err;

3
plat/hisilicon/poplar/bl2_plat_setup.c
View File

@ -193,6 +193,9 @@ int poplar_bl2_handle_post_image_load(unsigned int image_id)
}
break;
#endif
default:
/* Do nothing in default case */
break;
}
return err;

11
plat/mediatek/common/custom/oem_svc.c
View File

@ -41,15 +41,8 @@ uint64_t oem_smc_handler(uint32_t smc_fid,
void *handle,
uint64_t flags)
{
uint64_t rc;
switch (smc_fid) {
default:
rc = SMC_UNK;
WARN("Unimplemented OEM Call: 0x%x\n", smc_fid);
}
SMC_RET1(handle, rc);
WARN("Unimplemented OEM Call: 0x%x\n", smc_fid);
SMC_RET1(handle, SMC_UNK);
}
/*

3
plat/mediatek/common/mtk_sip_svc.c
View File

@ -71,6 +71,9 @@ uint64_t mediatek_sip_handler(uint32_t smc_fid,
boot_to_kernel(x1, x2, x3, x4);
SMC_RET0(handle);
#endif
default:
/* Do nothing in default case */
break;
}
}

3
plat/qemu/qemu_bl2_setup.c
View File

@ -287,6 +287,9 @@ static int qemu_bl2_handle_post_image_load(unsigned int image_id)
bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr();
bl_mem_params->ep_info.spsr = qemu_get_spsr_for_bl33_entry();
break;
default:
/* Do nothing in default case */
break;
}
return err;

2
plat/rockchip/common/rockchip_sip_svc.c
View File

@ -59,13 +59,11 @@ uint64_t sip_smc_handler(uint32_t smc_fid,
case SIP_SVC_UID:
/* Return UID to the caller */
SMC_UUID_RET(handle, rk_sip_svc_uid);
break;
case SIP_SVC_VERSION:
/* Return the version of current implementation */
SMC_RET2(handle, RK_SIP_SVC_VERSION_MAJOR,
RK_SIP_SVC_VERSION_MINOR);
break;
default:
return rockchip_plat_sip_handler(smc_fid, x1, x2, x3, x4,

7
plat/rockchip/rk3368/plat_sip_calls.c
View File

@ -19,9 +19,6 @@ uint64_t rockchip_plat_sip_handler(uint32_t smc_fid,
void *handle,
uint64_t flags)
{
switch (smc_fid) {
default:
ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
SMC_RET1(handle, SMC_UNK);
}
ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
SMC_RET1(handle, SMC_UNK);
}

3
plat/rockchip/rk3399/drivers/dram/dfs.c
View File

@ -207,6 +207,9 @@ static void sdram_timing_cfg_init(struct timing_related_config *ptiming_config,
ptiming_config->rdbi = 0;
ptiming_config->wdbi = 0;
break;
default:
/* Do nothing in default case */
break;
}
ptiming_config->dramds = drv_config->dram_side_drv;
ptiming_config->dramodt = drv_config->dram_side_dq_odt;

3
plat/rockchip/rk3399/drivers/dram/dram_spec_timing.c
View File

@ -1314,5 +1314,8 @@ void dram_get_parameter(struct timing_related_config *timing_config,
case LPDDR4:
lpddr4_get_parameter(timing_config, pdram_timing);
break;
default:
/* Do nothing in default case */
break;
}
}

24
plat/rockchip/rk3399/drivers/pmu/pmu.c
View File

@ -310,6 +310,7 @@ static int pmu_set_power_domain(uint32_t pd_id, uint32_t pd_state)
pmu_bus_idle_req(BUS_ID_PERIHP, state);
break;
default:
/* Do nothing in default case */
break;
}
@ -647,12 +648,8 @@ int rockchip_soc_cores_pwr_dm_off(void)
int rockchip_soc_hlvl_pwr_dm_off(uint32_t lvl,
plat_local_state_t lvl_state)
{
switch (lvl) {
case MPIDR_AFFLVL1:
if (lvl == MPIDR_AFFLVL1) {
clst_pwr_domain_suspend(lvl_state);
break;
default:
break;
}
return PSCI_E_SUCCESS;
@ -675,12 +672,8 @@ int rockchip_soc_cores_pwr_dm_suspend(void)
int rockchip_soc_hlvl_pwr_dm_suspend(uint32_t lvl, plat_local_state_t lvl_state)
{
switch (lvl) {
case MPIDR_AFFLVL1:
if (lvl == MPIDR_AFFLVL1) {
clst_pwr_domain_suspend(lvl_state);
break;
default:
break;
}
return PSCI_E_SUCCESS;
@ -698,12 +691,8 @@ int rockchip_soc_cores_pwr_dm_on_finish(void)
int rockchip_soc_hlvl_pwr_dm_on_finish(uint32_t lvl,
plat_local_state_t lvl_state)
{
switch (lvl) {
case MPIDR_AFFLVL1:
if (lvl == MPIDR_AFFLVL1) {
clst_pwr_domain_resume(lvl_state);
break;
default:
break;
}
return PSCI_E_SUCCESS;
@ -721,11 +710,8 @@ int rockchip_soc_cores_pwr_dm_resume(void)
int rockchip_soc_hlvl_pwr_dm_resume(uint32_t lvl, plat_local_state_t lvl_state)
{
switch (lvl) {
case MPIDR_AFFLVL1:
if (lvl == MPIDR_AFFLVL1) {
clst_pwr_domain_resume(lvl_state);
default:
break;
}
return PSCI_E_SUCCESS;

3
plat/rpi3/rpi3_bl2_setup.c
View File

@ -81,6 +81,9 @@ int bl2_plat_handle_post_image_load(unsigned int image_id)
bl_mem_params->ep_info.spsr = rpi3_get_spsr_for_bl33_entry();
break;
default:
/* Do nothing in default case */
break;
}
return err;

1
plat/socionext/uniphier/uniphier_bl2_setup.c
View File

@ -85,6 +85,7 @@ void bl2_el3_plat_arch_setup(void)
break;
default:
plat_error_handler(-ENOTSUP);
break;
}
if (!skip_scp) {

9
plat/xilinx/zynqmp/aarch64/zynqmp_common.c
View File

@ -48,6 +48,9 @@ unsigned int zynqmp_get_uart_clk(void)
return 25000000;
case ZYNQMP_CSU_VERSION_QEMU:
return 133000000;
default:
/* Do nothing in default case */
break;
}
return 100000000;
@ -187,6 +190,9 @@ static void zynqmp_print_platform_name(void)
case ZYNQMP_CSU_VERSION_SILICON:
label = "silicon";
break;
default:
/* Do nothing in default case */
break;
}
NOTICE("ATF running on XCZU%s/%s v%d/RTL%d.%d at 0x%x%s\n",
@ -258,6 +264,9 @@ unsigned int plat_get_syscnt_freq2(void)
return 4000000;
case ZYNQMP_CSU_VERSION_QEMU:
return 50000000;
default:
/* Do nothing in default case */
break;
}
return mmio_read_32(IOU_SCNTRS_BASEFREQ);

2
services/spd/opteed/opteed_main.c
View File

@ -311,6 +311,7 @@ uint64_t opteed_smc_handler(uint32_t smc_fid,
* OPTEE. Jump back to the original C runtime context.
*/
opteed_synchronous_sp_exit(optee_ctx, x1);
break;
/*
@ -345,6 +346,7 @@ uint64_t opteed_smc_handler(uint32_t smc_fid,
* return value to the caller
*/
opteed_synchronous_sp_exit(optee_ctx, x1);
break;
/*
* OPTEE is returning from a call or being preempted from a call, in

1
services/spd/tlkd/tlkd_common.c
View File

@ -49,6 +49,7 @@ uint64_t tlkd_va_translate(uintptr_t va, int type)
break;
default:
assert(0);
break;
}
/* get the (NS/S) physical address */

2
services/spd/tlkd/tlkd_main.c
View File

@ -350,6 +350,7 @@ uint64_t tlkd_smc_handler(uint32_t smc_fid,
* context.
*/
tlkd_synchronous_sp_exit(&tlk_ctx, x1);
break;
/*
* These function IDs are used only by TLK to indicate it has
@ -375,6 +376,7 @@ uint64_t tlkd_smc_handler(uint32_t smc_fid,
* return value to the caller
*/
tlkd_synchronous_sp_exit(&tlk_ctx, x1);
break;
/*
* Return the number of service function IDs implemented to

3
services/spd/tspd/tspd_main.c
View File

@ -435,6 +435,7 @@ uint64_t tspd_smc_handler(uint32_t smc_fid,
* context.
*/
tspd_synchronous_sp_exit(tsp_ctx, x1);
break;
#endif
/*
* This function ID is used only by the SP to indicate it has finished
@ -475,6 +476,7 @@ uint64_t tspd_smc_handler(uint32_t smc_fid,
* return value to the caller
*/
tspd_synchronous_sp_exit(tsp_ctx, x1);
break;
/*
* Request from non-secure client to perform an
@ -591,7 +593,6 @@ uint64_t tspd_smc_handler(uint32_t smc_fid,
SMC_RET3(ns_cpu_context, x1, x2, x3);
}
break;
/*
* Request from the non-secure world to abort a preempted Yielding SMC
* Call.

21
services/std_svc/sdei/sdei_main.c
View File

@ -916,7 +916,6 @@ uint64_t sdei_smc_handler(uint32_t smc_fid,
ret = sdei_version();
SDEI_LOG("< VER:%lx\n", ret);
SMC_RET1(handle, ret);
break;
case SDEI_EVENT_REGISTER:
x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
@ -925,32 +924,27 @@ uint64_t sdei_smc_handler(uint32_t smc_fid,
ret = sdei_event_register(x1, x2, x3, x4, x5);
SDEI_LOG("< REG:%ld\n", ret);
SMC_RET1(handle, ret);
break;
case SDEI_EVENT_ENABLE:
SDEI_LOG("> ENABLE(n:%d)\n", (int) x1);
ret = sdei_event_enable(x1);
SDEI_LOG("< ENABLE:%ld\n", ret);
SMC_RET1(handle, ret);
break;
case SDEI_EVENT_DISABLE:
SDEI_LOG("> DISABLE(n:%d)\n", (int) x1);
ret = sdei_event_disable(x1);
SDEI_LOG("< DISABLE:%ld\n", ret);
SMC_RET1(handle, ret);
break;
case SDEI_EVENT_CONTEXT:
SDEI_LOG("> CTX(p:%d):%lx\n", (int) x1, read_mpidr_el1());
ret = sdei_event_context(handle, x1);
SDEI_LOG("< CTX:%ld\n", ret);
SMC_RET1(handle, ret);
break;
case SDEI_EVENT_COMPLETE_AND_RESUME:
resume = 1;
/* Fall through */
case SDEI_EVENT_COMPLETE:
SDEI_LOG("> COMPLETE(r:%d sta/ep:%lx):%lx\n", resume, x1,
@ -969,92 +963,81 @@ uint64_t sdei_smc_handler(uint32_t smc_fid,
SMC_RET1(handle, ret);
SMC_RET0(handle);
break;
case SDEI_EVENT_STATUS:
SDEI_LOG("> STAT(n:%d)\n", (int) x1);
ret = sdei_event_status(x1);
SDEI_LOG("< STAT:%ld\n", ret);
SMC_RET1(handle, ret);
break;
case SDEI_EVENT_GET_INFO:
SDEI_LOG("> INFO(n:%d, %d)\n", (int) x1, (int) x2);
ret = sdei_event_get_info(x1, x2);
SDEI_LOG("< INFO:%ld\n", ret);
SMC_RET1(handle, ret);
break;
case SDEI_EVENT_UNREGISTER:
SDEI_LOG("> UNREG(n:%d)\n", (int) x1);
ret = sdei_event_unregister(x1);
SDEI_LOG("< UNREG:%ld\n", ret);
SMC_RET1(handle, ret);
break;
case SDEI_PE_UNMASK:
SDEI_LOG("> UNMASK:%lx\n", read_mpidr_el1());
sdei_pe_unmask();
SDEI_LOG("< UNMASK:%d\n", 0);
SMC_RET1(handle, 0);
break;
case SDEI_PE_MASK:
SDEI_LOG("> MASK:%lx\n", read_mpidr_el1());
ret = sdei_pe_mask();
SDEI_LOG("< MASK:%ld\n", ret);
SMC_RET1(handle, ret);
break;
case SDEI_INTERRUPT_BIND:
SDEI_LOG("> BIND(%d)\n", (int) x1);
ret = sdei_interrupt_bind(x1);
SDEI_LOG("< BIND:%ld\n", ret);
SMC_RET1(handle, ret);
break;
case SDEI_INTERRUPT_RELEASE:
SDEI_LOG("> REL(%d)\n", (int) x1);
ret = sdei_interrupt_release(x1);
SDEI_LOG("< REL:%ld\n", ret);
SMC_RET1(handle, ret);
break;
case SDEI_SHARED_RESET:
SDEI_LOG("> S_RESET():%lx\n", read_mpidr_el1());
ret = sdei_shared_reset();
SDEI_LOG("< S_RESET:%ld\n", ret);
SMC_RET1(handle, ret);
break;
case SDEI_PRIVATE_RESET:
SDEI_LOG("> P_RESET():%lx\n", read_mpidr_el1());
ret = sdei_private_reset();
SDEI_LOG("< P_RESET:%ld\n", ret);
SMC_RET1(handle, ret);
break;
case SDEI_EVENT_ROUTING_SET:
SDEI_LOG("> ROUTE_SET(n:%d f:%lx aff:%lx)\n", (int) x1, x2, x3);
ret = sdei_event_routing_set(x1, x2, x3);
SDEI_LOG("< ROUTE_SET:%ld\n", ret);
SMC_RET1(handle, ret);
break;
case SDEI_FEATURES:
SDEI_LOG("> FTRS(f:%lx)\n", x1);
ret = sdei_features(x1);
SDEI_LOG("< FTRS:%lx\n", ret);
SMC_RET1(handle, ret);
break;
case SDEI_EVENT_SIGNAL:
SDEI_LOG("> SIGNAL(e:%lx t:%lx)\n", x1, x2);
ret = sdei_signal(x1, x2);
SDEI_LOG("< SIGNAL:%ld\n", ret);
SMC_RET1(handle, ret);
break;
default:
/* Do nothing in default case */
break;
}