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Merge "Tegra194: validate C6 power state type" into integration

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Mark Dykes 2020-05-21 21:17:25 +00:00 committed by TrustedFirmware Code Review
parent 1a7aa3b31d bc693ecc8b
commit 6ac1bb301b
1 changed files with 5 additions and 0 deletions
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5
plat/nvidia/tegra/soc/t194/plat_psci_handlers.c
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@ -73,6 +73,11 @@ int32_t tegra_soc_validate_power_state(uint32_t power_state,
switch (state_id) {
case PSTATE_ID_CORE_IDLE:
if (psci_get_pstate_type(power_state) != PSTATE_TYPE_STANDBY) {
ret = PSCI_E_INVALID_PARAMS;
break;
}
/* Core idle request */
req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE;
req_state->pwr_domain_state[MPIDR_AFFLVL1] = PSCI_LOCAL_STATE_RUN;