feat(morello): add support for nt_fw_config
This patch adds support to load nt_fw_config with the information from plat_info sds structure which is then passed from BL2 to BL33. Signed-off-by: sah01 <sahil@arm.com> Change-Id: I2242da7404c72a4f9c2e3d7f3b5c154890a78526
This commit is contained in:
sah01
Chandni Cherukuri
parent
4a7a9dafbc
commit
6ad6465e5c
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@ -16,5 +16,11 @@
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max-size = <0x200>;
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id = <TB_FW_CONFIG_ID>;
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};
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nt_fw-config {
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load-address = <0x0 0xFEF00000>;
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max-size = <0x0100000>;
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id = <NT_FW_CONFIG_ID>;
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};
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};
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};
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@ -0,0 +1,26 @@
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/*
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* Copyright (c) 2021, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/dts-v1/;
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/ {
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/* compatible string */
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compatible = "arm,morello";
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/*
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* Place holder for platform-info node with default values.
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* The values will be set to the correct values during
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* the BL2 stage of boot.
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*/
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platform-info {
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local-ddr-size = <0x0 0x0>;
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#ifdef TARGET_PLATFORM_SOC
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remote-ddr-size = <0x0 0x0>;
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remote-chip-count = <0x0>;
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multichip-mode = <0x0>;
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scc-config = <0x0>;
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#endif
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};
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};
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@ -204,7 +204,6 @@ void bl31_platform_setup(void)
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{
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int ret;
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struct morello_plat_info plat_info;
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struct morello_plat_info *copy_dest;
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ret = sds_init();
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if (ret != SDS_OK) {
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@ -241,14 +240,4 @@ void bl31_platform_setup(void)
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#ifdef TARGET_PLATFORM_SOC
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dmc_ecc_setup(&plat_info);
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#endif
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/*
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* Pass platform information to BL33. This method is followed as
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* currently there is no BL1/BL2 involved in boot flow of MORELLO.
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* When TBBR is implemented for MORELLO, this method should be removed
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* and platform information should be passed to BL33 using NT_FW_CONFIG
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* passing mechanism.
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*/
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copy_dest = (struct morello_plat_info *)MORELLO_PLATFORM_INFO_BASE;
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*copy_dest = plat_info;
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}
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@ -0,0 +1,185 @@
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/*
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* Copyright (c) 2021, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch_helpers.h>
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#include <common/debug.h>
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#include <common/desc_image_load.h>
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#include <drivers/arm/css/sds.h>
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#include <libfdt.h>
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#include "morello_def.h"
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#include <plat/arm/common/plat_arm.h>
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#include <plat/common/platform.h>
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#ifdef TARGET_PLATFORM_FVP
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/*
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* Platform information structure stored in SDS.
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* This structure holds information about platform's DDR
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* size which is an information about multichip setup
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* - Local DDR size in bytes, DDR memory in main board
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*/
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struct morello_plat_info {
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uint64_t local_ddr_size;
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} __packed;
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#else
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/*
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* Platform information structure stored in SDS.
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* This structure holds information about platform's DDR
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* size which is an information about multichip setup
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* - Local DDR size in bytes, DDR memory in main board
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* - Remote DDR size in bytes, DDR memory in remote board
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* - remote_chip_count
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* - multichip mode
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* - scc configuration
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*/
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struct morello_plat_info {
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uint64_t local_ddr_size;
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uint64_t remote_ddr_size;
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uint8_t remote_chip_count;
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bool multichip_mode;
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uint32_t scc_config;
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} __packed;
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#endif
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/* In client mode, a part of the DDR memory is reserved for Tag bits.
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* Calculate the usable memory size after subtracting the Tag memory.
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*/
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static inline uint64_t get_mem_client_mode(uint64_t size)
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{
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return (size - (size / 128ULL));
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}
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/*******************************************************************************
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* This function inserts Platform information via device tree nodes as,
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* platform-info {
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* local-ddr-size = <0x0 0x0>;
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*#ifdef TARGET_PLATFORM_SOC
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* remote-ddr-size = <0x0 0x0>;
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* remote-chip-count = <0x0>;
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* multichip-mode = <0x0>;
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* scc-config = <0x0>;
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*#endif
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* };
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******************************************************************************/
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static int plat_morello_append_config_node(struct morello_plat_info *plat_info)
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{
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bl_mem_params_node_t *mem_params;
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void *fdt;
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int nodeoffset, err;
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uint64_t usable_mem_size;
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usable_mem_size = plat_info->local_ddr_size;
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mem_params = get_bl_mem_params_node(NT_FW_CONFIG_ID);
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if (mem_params == NULL) {
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ERROR("NT_FW CONFIG base address is NULL\n");
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return -1;
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}
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fdt = (void *)(mem_params->image_info.image_base);
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/* Check the validity of the fdt */
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if (fdt_check_header(fdt) != 0) {
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ERROR("Invalid NT_FW_CONFIG DTB passed\n");
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return -1;
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}
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nodeoffset = fdt_subnode_offset(fdt, 0, "platform-info");
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if (nodeoffset < 0) {
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ERROR("NT_FW_CONFIG: Failed to get platform-info node offset\n");
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return -1;
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}
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#ifdef TARGET_PLATFORM_SOC
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err = fdt_setprop_u64(fdt, nodeoffset, "remote-ddr-size",
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plat_info->remote_ddr_size);
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if (err < 0) {
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ERROR("NT_FW_CONFIG: Failed to set remote-ddr-size\n");
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return -1;
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}
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err = fdt_setprop_u32(fdt, nodeoffset, "remote-chip-count",
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plat_info->remote_chip_count);
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if (err < 0) {
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ERROR("NT_FW_CONFIG: Failed to set remote-chip-count\n");
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return -1;
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}
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err = fdt_setprop_u32(fdt, nodeoffset, "multichip-mode",
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plat_info->multichip_mode);
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if (err < 0) {
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ERROR("NT_FW_CONFIG: Failed to set multichip-mode\n");
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return -1;
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}
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err = fdt_setprop_u32(fdt, nodeoffset, "scc-config",
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plat_info->scc_config);
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if (err < 0) {
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ERROR("NT_FW_CONFIG: Failed to set scc-config\n");
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return -1;
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}
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if (plat_info->scc_config & MORELLO_SCC_CLIENT_MODE_MASK) {
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usable_mem_size = get_mem_client_mode(plat_info->local_ddr_size);
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}
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#endif
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err = fdt_setprop_u64(fdt, nodeoffset, "local-ddr-size",
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usable_mem_size);
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if (err < 0) {
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ERROR("NT_FW_CONFIG: Failed to set local-ddr-size\n");
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return -1;
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}
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flush_dcache_range((uintptr_t)fdt, mem_params->image_info.image_size);
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return 0;
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}
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/*******************************************************************************
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* This function returns the list of executable images.
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******************************************************************************/
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bl_params_t *plat_get_next_bl_params(void)
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{
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int ret;
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struct morello_plat_info plat_info;
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ret = sds_init();
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if (ret != SDS_OK) {
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ERROR("SDS initialization failed. ret:%d\n", ret);
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panic();
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}
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ret = sds_struct_read(MORELLO_SDS_PLATFORM_INFO_STRUCT_ID,
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MORELLO_SDS_PLATFORM_INFO_OFFSET,
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&plat_info,
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MORELLO_SDS_PLATFORM_INFO_SIZE,
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SDS_ACCESS_MODE_NON_CACHED);
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if (ret != SDS_OK) {
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ERROR("Error getting platform info from SDS. ret:%d\n", ret);
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panic();
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}
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/* Validate plat_info SDS */
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#ifdef TARGET_PLATFORM_FVP
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if (plat_info.local_ddr_size == 0U) {
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#else
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if ((plat_info.local_ddr_size == 0U)
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|| (plat_info.local_ddr_size > MORELLO_MAX_DDR_CAPACITY)
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|| (plat_info.remote_ddr_size > MORELLO_MAX_DDR_CAPACITY)
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|| (plat_info.remote_chip_count > MORELLO_MAX_REMOTE_CHIP_COUNT)
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){
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#endif
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ERROR("platform info SDS is corrupted\n");
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panic();
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}
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ret = plat_morello_append_config_node(&plat_info);
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if (ret != 0) {
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panic();
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}
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return arm_get_next_bl_params();
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}
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@ -40,8 +40,10 @@ BL1_SOURCES := ${MORELLO_CPU_SOURCES} \
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BL2_SOURCES := ${MORELLO_BASE}/morello_security.c \
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${MORELLO_BASE}/morello_err.c \
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${MORELLO_BASE}/morello_trusted_boot.c \
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${MORELLO_BASE}/morello_bl2_setup.c \
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${MORELLO_BASE}/morello_image_load.c \
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lib/utils/mem_region.c \
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${MORELLO_BASE}/morello_bl2_setup.c
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drivers/arm/css/sds/sds.c
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BL31_SOURCES := ${MORELLO_CPU_SOURCES} \
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${INTERCONNECT_SOURCES} \
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@ -54,14 +56,18 @@ BL31_SOURCES := ${MORELLO_CPU_SOURCES} \
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FDT_SOURCES += fdts/morello-${TARGET_PLATFORM}.dts \
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${MORELLO_BASE}/fdts/morello_fw_config.dts \
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${MORELLO_BASE}/fdts/morello_tb_fw_config.dts \
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${MORELLO_BASE}/fdts/morello_nt_fw_config.dts
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FW_CONFIG := ${BUILD_PLAT}/fdts/morello_fw_config.dtb
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TB_FW_CONFIG := ${BUILD_PLAT}/fdts/morello_tb_fw_config.dtb
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NT_FW_CONFIG := ${BUILD_PLAT}/fdts/morello_nt_fw_config.dtb
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# Add the FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
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# Add the TB_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
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# Add the NT_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config,${NT_FW_CONFIG}))
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MORELLO_FW_NVCTR_VAL := 0
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TFW_NVCTR_VAL := ${MORELLO_FW_NVCTR_VAL}
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