andrius
/
arm-trusted-firmware
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Merge "Cortex A9:errata 794073 workaround" into integration

This commit is contained in:
Antonio Niño Díaz 2019-04-12 10:40:35 +00:00 committed by TrustedFirmware Code Review
parent 72db70ca18 dd4cf2c745
commit 6cf7b2184b
4 changed files with 28 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
docs/cpu-specific-build-macros.rst
View File

@ -71,6 +71,11 @@ for it to specify which errata workarounds should be enabled or not.
The value of the build flags is 0 by default, that is, disabled. A value of 1
will enable it.
For Cortex-A9, the following errata build flags are defined :
- ``ERRATA_A9_794073``: This applies errata 794073 workaround to Cortex-A15
CPU. This needs to be enabled for all revisions of the CPU.
For Cortex-A15, the following errata build flags are defined :
- ``ERRATA_A15_816470``: This applies errata 816470 workaround to Cortex-A15
@ -260,7 +265,7 @@ architecture that can be enabled by the platform as desired.
--------------
*Copyright (c) 2014-2018, Arm Limited and Contributors. All rights reserved.*
*Copyright (c) 2014-2019, Arm Limited and Contributors. All rights reserved.*
.. _CVE-2017-5715: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2017-5715
.. _CVE-2018-3639: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2018-3639

6
lib/aarch32/misc_helpers.S
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -171,6 +171,10 @@ endfunc memcpy4
func disable_mmu_secure
mov r1, #(SCTLR_M_BIT | SCTLR_C_BIT)
do_disable_mmu:
#if ERRATA_A9_794073
stcopr r0, BPIALL
dsb
#endif
ldcopr r0, SCTLR
bic r0, r0, r1
stcopr r0, SCTLR

10
lib/cpus/aarch32/cortex_a9.S
View File

@ -35,6 +35,15 @@ func cortex_a9_enable_smp
bx lr
endfunc cortex_a9_enable_smp
func check_errata_a9_794073
#if ERRATA_A9_794073
mov r0, #ERRATA_APPLIES
#else
mov r0, #ERRATA_MISSING
#endif
bx lr
endfunc check_errata_cve_2017_5715
func check_errata_cve_2017_5715
#if WORKAROUND_CVE_2017_5715
mov r0, #ERRATA_APPLIES
@ -59,6 +68,7 @@ func cortex_a9_errata_report
* checking functions of each errata.
*/
report_errata WORKAROUND_CVE_2017_5715, cortex_a9, cve_2017_5715
report_errata ERRATA_A9_794073, cortex_a9, a9_79407
pop {r12, lr}
bx lr

7
lib/cpus/cpu-ops.mk
View File

@ -53,6 +53,9 @@ endif
# These should be enabled by the platform if the erratum workaround needs to be
# applied.
# Flag to apply erratum 794073 workaround when disabling mmu.
ERRATA_A9_794073 ?=0
# Flag to apply erratum 816470 workaround during power down. This erratum
# applies only to revision >= r3p0 of the Cortex A15 cpu.
ERRATA_A15_816470 ?=0
@ -212,6 +215,10 @@ ERRATA_N1_1043202 ?=1
# higher DSU power consumption on idle.
ERRATA_DSU_936184 ?=0
# Process ERRATA_A9_794073 flag
$(eval $(call assert_boolean,ERRATA_A9_794073))
$(eval $(call add_define,ERRATA_A9_794073))
# Process ERRATA_A15_816470 flag
$(eval $(call assert_boolean,ERRATA_A15_816470))
$(eval $(call add_define,ERRATA_A15_816470))