Merge changes I66dc6855,I2217a1ad into integration

* changes:
  rockchip: Update BL31_BASE to 0x40000
  rockchip: Fix typo for TF content text
This commit is contained in:
Sandrine Bailleux 2019-09-23 11:13:47 +00:00 committed by TrustedFirmware Code Review
commit 6dcb6045cc
5 changed files with 10 additions and 10 deletions

View File

@ -69,7 +69,7 @@
/*******************************************************************************
* Platform memory map related constants
******************************************************************************/
/* TF txet, ro, rw, Size: 512KB */
/* TF text, ro, rw, Size: 512KB */
#define TZRAM_BASE (0x0)
#define TZRAM_SIZE (0x80000)
@ -79,7 +79,7 @@
/*
* Put BL3-1 at the top of the Trusted RAM
*/
#define BL31_BASE (TZRAM_BASE + 0x10000)
#define BL31_BASE (TZRAM_BASE + 0x40000)
#define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE)
/*******************************************************************************

View File

@ -10,9 +10,9 @@
/*******************************************************************************
* Platform memory map related constants
******************************************************************************/
/* TF txet, ro, rw, Size: 2MB */
/* TF text, ro, rw, Size: 1MB */
#define TZRAM_BASE (0x0)
#define TZRAM_SIZE (0x200000)
#define TZRAM_SIZE (0x100000)
/*******************************************************************************
* BL32 specific defines.
@ -20,7 +20,7 @@
/*
* Put BL32 at the top of the Trusted RAM
*/
#define BL32_BASE (TZRAM_BASE + 0x100000)
#define BL32_BASE (TZRAM_BASE + 0x40000)
#define BL32_LIMIT (TZRAM_BASE + TZRAM_SIZE)
#endif /* BL32_PARAM_H */

View File

@ -66,7 +66,7 @@
/*******************************************************************************
* Platform memory map related constants
******************************************************************************/
/* TF txet, ro, rw, Size: 512KB */
/* TF text, ro, rw, Size: 512KB */
#define TZRAM_BASE (0x0)
#define TZRAM_SIZE (0x80000)
@ -76,7 +76,7 @@
/*
* Put BL3-1 at the top of the Trusted RAM
*/
#define BL31_BASE (TZRAM_BASE + 0x10000)
#define BL31_BASE (TZRAM_BASE + 0x40000)
#define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE)
/*******************************************************************************

View File

@ -67,7 +67,7 @@
/*******************************************************************************
* Platform memory map related constants
******************************************************************************/
/* TF txet, ro, rw, Size: 512KB */
/* TF text, ro, rw, Size: 512KB */
#define TZRAM_BASE (0x0)
#define TZRAM_SIZE (0x80000)
@ -77,7 +77,7 @@
/*
* Put BL3-1 at the top of the Trusted RAM
*/
#define BL31_BASE (TZRAM_BASE + 0x10000)
#define BL31_BASE (TZRAM_BASE + 0x40000)
#define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE)
/*******************************************************************************

View File

@ -20,7 +20,7 @@
/*
* Put BL31 at the top of the Trusted RAM
*/
#define BL31_BASE (TZRAM_BASE + 0x1000)
#define BL31_BASE (TZRAM_BASE + 0x40000)
#define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE)
#endif /* BL31_PARAM_H */