refactor(allwinner): move DTB change code into allwinner/common

So far the H616 was the only Allwinner SoC needed to amend the DTB, to
reserve the DRAM portion that BL31 occupies.
To allow other SoCs to modify the DTB as well, without duplicating code,
move the DTB change routines into Allwinner common code, and generalise
the current code to allow other modifications.

No functional change intended.

Change-Id: I080ea07b6470367f3c2573a4368f8ef5196d411c
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
This commit is contained in:
Andre Przywara 2021-12-19 13:39:40 +00:00 committed by Joanna Farley
parent e61c00fa4b
commit 6fa8e72e7b
5 changed files with 26 additions and 7 deletions

View File

@ -65,6 +65,23 @@ SUNXI_SETUP_REGULATORS ?= 1
$(eval $(call assert_boolean,SUNXI_SETUP_REGULATORS))
$(eval $(call add_define,SUNXI_SETUP_REGULATORS))
SUNXI_BL31_IN_DRAM ?= 0
$(eval $(call assert_boolean,SUNXI_BL31_IN_DRAM))
ifeq (${SUNXI_BL31_IN_DRAM},1)
SUNXI_AMEND_DTB := 1
$(eval $(call add_define,SUNXI_BL31_IN_DRAM))
endif
SUNXI_AMEND_DTB ?= 0
$(eval $(call assert_boolean,SUNXI_AMEND_DTB))
$(eval $(call add_define,SUNXI_AMEND_DTB))
ifeq (${SUNXI_AMEND_DTB},1)
BL31_SOURCES += common/fdt_fixup.c \
${AW_PLAT}/common/sunxi_prepare_dtb.c
endif
# The bootloader is guaranteed to only run on CPU 0 by the boot ROM.
COLD_BOOT_SINGLE_CPU := 1

View File

@ -41,7 +41,7 @@ void sunxi_set_gpio_out(char port, int pin, bool level_high);
int sunxi_init_platform_r_twi(uint16_t socid, bool use_rsb);
void sunxi_execute_arisc_code(uint32_t *code, size_t size, uint16_t param);
#ifdef SUNXI_BL31_IN_DRAM
#if SUNXI_AMEND_DTB
void sunxi_prepare_dtb(void *fdt);
#else
static inline void sunxi_prepare_dtb(void *fdt)

View File

@ -180,6 +180,7 @@ void bl31_platform_setup(void)
sunxi_pmic_setup(soc_id, fdt);
/* Change the DTB if the configuration requires so. */
sunxi_prepare_dtb(fdt);
INFO("BL31: Platform setup done\n");

View File

@ -19,18 +19,21 @@ void sunxi_prepare_dtb(void *fdt)
if (fdt == NULL || fdt_check_header(fdt) != 0) {
return;
}
ret = fdt_open_into(fdt, fdt, 0x100000);
ret = fdt_open_into(fdt, fdt, 0x10000);
if (ret < 0) {
ERROR("Preparing devicetree at %p: error %d\n", fdt, ret);
return;
}
#ifdef SUNXI_BL31_IN_DRAM
/* Reserve memory used by Trusted Firmware. */
if (fdt_add_reserved_memory(fdt, "tf-a@40000000", BL31_BASE,
BL31_LIMIT - BL31_BASE)) {
WARN("Failed to add reserved memory nodes to DT.\n");
return;
}
#endif
ret = fdt_pack(fdt);
if (ret < 0) {
@ -38,6 +41,6 @@ void sunxi_prepare_dtb(void *fdt)
fdt, ret);
} else {
clean_dcache_range((uintptr_t)fdt, fdt_blob_size(fdt));
INFO("Changed devicetree to reserve BL31 memory.\n");
INFO("Changed devicetree.\n");
}
}

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@ -4,6 +4,8 @@
# SPDX-License-Identifier: BSD-3-Clause
#
SUNXI_BL31_IN_DRAM := 1
# Without a management processor there is no SCPI support.
SUNXI_PSCI_USE_SCPI := 0
SUNXI_PSCI_USE_NATIVE := 1
@ -18,7 +20,3 @@ endif
BL31_SOURCES += drivers/allwinner/axp/axp805.c \
drivers/allwinner/sunxi_rsb.c \
common/fdt_fixup.c \
${AW_PLAT}/${PLAT}/prepare_dtb.c
$(eval $(call add_define,SUNXI_BL31_IN_DRAM))