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feat(plat/rcar3): remove access to RMSTPCRn registers in R-Car D3 

Because the Realtime module stop control register n (RMSTPCRn)
are not supported in R-Car D3. Therefore, remove access to these
registers in R-Car D3.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I4647e28d0e176ff97151e9842019ba12cefe5c03
This commit is contained in:
Toshiyuki Ogasahara 2021-07-12 19:20:24 +09:00 committed by Marek Vasut
parent 14f0a08172
commit 71f2239f53
1 changed files with 2 additions and 20 deletions
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22
plat/renesas/common/bl2_cpg_init.c
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@ -40,7 +40,6 @@ static void bl2_system_cpg_init_e3(void);
#endif
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_D3)
static void bl2_realtime_cpg_init_d3(void);
static void bl2_system_cpg_init_d3(void);
#endif
@ -292,23 +291,6 @@ static void bl2_system_cpg_init_e3(void)
#endif
#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_D3)
static void bl2_realtime_cpg_init_d3(void)
{
/* Realtime Module Stop Control Registers */
cpg_write(RMSTPCR0, 0x00010000U);
cpg_write(RMSTPCR1, 0xFFFFFFFFU);
cpg_write(RMSTPCR2, 0x00060FDCU);
cpg_write(RMSTPCR3, 0xFFFFFFDFU);
cpg_write(RMSTPCR4, 0x80000184U);
cpg_write(RMSTPCR5, 0x83FFFFFFU);
cpg_write(RMSTPCR6, 0xFFFFFFFFU);
cpg_write(RMSTPCR7, 0xFFFFFFFFU);
cpg_write(RMSTPCR8, 0x00F1FFF7U);
cpg_write(RMSTPCR9, 0xF3F5E016U);
cpg_write(RMSTPCR10, 0xFFFEFFE0U);
cpg_write(RMSTPCR11, 0x000000B7U);
}
static void bl2_system_cpg_init_d3(void)
{
/* System Module Stop Control Registers */
@ -356,7 +338,7 @@ void bl2_cpg_init(void)
bl2_realtime_cpg_init_e3();
break;
case PRR_PRODUCT_D3:
bl2_realtime_cpg_init_d3();
/* no need */
break;
default:
panic();
@ -373,7 +355,7 @@ void bl2_cpg_init(void)
#elif RCAR_LSI == RCAR_E3 || RCAR_LSI == RZ_G2E
bl2_realtime_cpg_init_e3();
#elif RCAR_LSI == RCAR_D3
bl2_realtime_cpg_init_d3();
/* no need */
#else
#error "Don't have CPG initialize routine(unknown)."
#endif