From 737ad29bf992a7a79d538d1e0b47c7f38d9a4b9d Mon Sep 17 00:00:00 2001 From: Yann Gautier Date: Fri, 11 Jun 2021 10:54:56 +0200 Subject: [PATCH] feat(stm32_gpio): add a function to reset a pin Add set_gpio_reset_cfg() to set a pin in its reset configuration: analog, no-pull, speed low, and its secure configuration, thanks to stm32_gpio_is_secure_at_reset(). Signed-off-by: Yann Gautier Change-Id: I7b73c3636859f97fcc57f81cf68b42efc727922e --- drivers/st/gpio/stm32_gpio.c | 9 ++++++++- include/drivers/st/stm32_gpio.h | 3 ++- plat/st/common/include/stm32mp_common.h | 1 + plat/st/stm32mp1/stm32mp1_private.c | 9 +++++++++ 4 files changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/st/gpio/stm32_gpio.c b/drivers/st/gpio/stm32_gpio.c index 7d63262d7..51276f489 100644 --- a/drivers/st/gpio/stm32_gpio.c +++ b/drivers/st/gpio/stm32_gpio.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2020, STMicroelectronics - All Rights Reserved + * Copyright (c) 2016-2021, STMicroelectronics - All Rights Reserved * * SPDX-License-Identifier: BSD-3-Clause */ @@ -283,3 +283,10 @@ void set_gpio_secure_cfg(uint32_t bank, uint32_t pin, bool secure) stm32mp_clk_disable(clock); } + +void set_gpio_reset_cfg(uint32_t bank, uint32_t pin) +{ + set_gpio(bank, pin, GPIO_MODE_ANALOG, GPIO_SPEED_LOW, + GPIO_NO_PULL, GPIO_ALTERNATE_(0), DT_DISABLED); + set_gpio_secure_cfg(bank, pin, stm32_gpio_is_secure_at_reset(bank)); +} diff --git a/include/drivers/st/stm32_gpio.h b/include/drivers/st/stm32_gpio.h index e241f584f..b07234515 100644 --- a/include/drivers/st/stm32_gpio.h +++ b/include/drivers/st/stm32_gpio.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2019, STMicroelectronics - All Rights Reserved + * Copyright (c) 2015-2021, STMicroelectronics - All Rights Reserved * * SPDX-License-Identifier: BSD-3-Clause */ @@ -52,6 +52,7 @@ int dt_set_pinctrl_config(int node); void set_gpio(uint32_t bank, uint32_t pin, uint32_t mode, uint32_t speed, uint32_t pull, uint32_t alternate, uint8_t status); void set_gpio_secure_cfg(uint32_t bank, uint32_t pin, bool secure); +void set_gpio_reset_cfg(uint32_t bank, uint32_t pin); #endif /*__ASSEMBLER__*/ #endif /* STM32_GPIO_H */ diff --git a/plat/st/common/include/stm32mp_common.h b/plat/st/common/include/stm32mp_common.h index 6183964c0..693640fd2 100644 --- a/plat/st/common/include/stm32mp_common.h +++ b/plat/st/common/include/stm32mp_common.h @@ -69,6 +69,7 @@ uintptr_t get_uart_address(uint32_t instance_nb); uintptr_t stm32_get_gpio_bank_base(unsigned int bank); unsigned long stm32_get_gpio_bank_clock(unsigned int bank); uint32_t stm32_get_gpio_bank_offset(unsigned int bank); +bool stm32_gpio_is_secure_at_reset(unsigned int bank); /* Return node offset for target GPIO bank ID @bank or a FDT error code */ int stm32_get_gpio_bank_pinctrl_node(void *fdt, unsigned int bank); diff --git a/plat/st/stm32mp1/stm32mp1_private.c b/plat/st/stm32mp1/stm32mp1_private.c index 0165cfedf..d7f3dd82f 100644 --- a/plat/st/stm32mp1/stm32mp1_private.c +++ b/plat/st/stm32mp1/stm32mp1_private.c @@ -120,6 +120,15 @@ uint32_t stm32_get_gpio_bank_offset(unsigned int bank) return bank * GPIO_BANK_OFFSET; } +bool stm32_gpio_is_secure_at_reset(unsigned int bank) +{ + if (bank == GPIO_BANK_Z) { + return true; + } + + return false; +} + unsigned long stm32_get_gpio_bank_clock(unsigned int bank) { if (bank == GPIO_BANK_Z) {