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Merge pull request #1282 from robertovargas-arm/misra-changes 

Misra changes
This commit is contained in:
davidcunado-arm 2018-02-28 18:53:30 +00:00 committed by GitHub
parent fd50c18adb fd116b9f6c
commit 73a9605197
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
75 changed files with 261 additions and 127 deletions
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2
Makefile
View File

@ -200,6 +200,8 @@ BL_COMMON_SOURCES += common/bl_common.c \
${STDLIB_SRCS}
INCLUDES += -Iinclude/bl1 \
-Iinclude/bl2 \
-Iinclude/bl2u \
-Iinclude/bl31 \
-Iinclude/common \
-Iinclude/common/${ARCH} \

2
bl1/bl1_main.c
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@ -163,7 +163,7 @@ void bl1_main(void)
* TODO: Add support for alternative image load mechanism e.g using virtio/elf
* loader etc.
******************************************************************************/
void bl1_load_bl2(void)
static void bl1_load_bl2(void)
{
image_desc_t *image_desc;
image_info_t *image_info;

3
bl2/aarch64/bl2_arch_setup.c
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@ -1,11 +1,12 @@
/*
* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <arch.h>
#include <arch_helpers.h>
#include "../bl2_private.h"
/*******************************************************************************
* Place holder function to perform any S-EL1 specific architectural setup. At

1
bl2/bl2_image_load_v2.c
View File

@ -14,6 +14,7 @@
#include <platform.h>
#include <platform_def.h>
#include <stdint.h>
#include "bl2_private.h"
/*******************************************************************************

3
bl2/bl2_main.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -7,6 +7,7 @@
#include <arch_helpers.h>
#include <auth_mod.h>
#include <bl1.h>
#include <bl2.h>
#include <bl_common.h>
#include <console.h>
#include <debug.h>

4
bl2/bl2_private.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -17,6 +17,6 @@ struct entry_point_info;
*****************************************/
void bl2_arch_setup(void);
struct entry_point_info *bl2_load_images(void);
void bl2_run_next_image(const entry_point_info_t *bl_ep_info);
void bl2_run_next_image(const struct entry_point_info *bl_ep_info);
#endif /* __BL2_PRIVATE_H__ */

3
bl2u/bl2u_main.c
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -9,6 +9,7 @@
#include <assert.h>
#include <auth_mod.h>
#include <bl1.h>
#include <bl2u.h>
#include <bl_common.h>
#include <console.h>
#include <debug.h>

4
bl31/bl31_context_mgmt.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -99,7 +99,7 @@ void cm_set_context_by_mpidr(uint64_t mpidr, void *context, uint32_t security_st
* existing cm library routines. This function is expected to be invoked for
* initializing the cpu_context for the CPU specified by MPIDR for first use.
******************************************************************************/
void cm_init_context(unsigned long mpidr, const entry_point_info_t *ep)
void cm_init_context(uint64_t mpidr, const entry_point_info_t *ep)
{
if ((mpidr & MPIDR_AFFINITY_MASK) ==
(read_mpidr_el1() & MPIDR_AFFINITY_MASK))

3
bl31/bl31_main.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -17,6 +17,7 @@
#include <pmf.h>
#include <runtime_instr.h>
#include <runtime_svc.h>
#include <std_svc.h>
#include <string.h>
#if ENABLE_RUNTIME_INSTRUMENTATION

4
common/desc_image_load.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -10,8 +10,6 @@
#include <desc_image_load.h>
extern bl_mem_params_node_t *bl_mem_params_desc_ptr;
extern unsigned int bl_mem_params_desc_num;
static bl_load_info_t bl_load_info;
static bl_params_t next_bl_params;

8
drivers/arm/gic/common/gic_common_private.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -49,6 +49,9 @@ unsigned int gicd_read_icactiver(uintptr_t base, unsigned int id);
unsigned int gicd_read_ipriorityr(uintptr_t base, unsigned int id);
unsigned int gicd_read_icfgr(uintptr_t base, unsigned int id);
unsigned int gicd_read_nsacr(uintptr_t base, unsigned int id);
unsigned int gicd_read_spendsgir(uintptr_t base, unsigned int id);
unsigned int gicd_read_cpendsgir(uintptr_t base, unsigned int id);
unsigned int gicd_read_itargetsr(uintptr_t base, unsigned int id);
void gicd_write_igroupr(uintptr_t base, unsigned int id, unsigned int val);
void gicd_write_isenabler(uintptr_t base, unsigned int id, unsigned int val);
void gicd_write_icenabler(uintptr_t base, unsigned int id, unsigned int val);
@ -59,6 +62,9 @@ void gicd_write_icactiver(uintptr_t base, unsigned int id, unsigned int val);
void gicd_write_ipriorityr(uintptr_t base, unsigned int id, unsigned int val);
void gicd_write_icfgr(uintptr_t base, unsigned int id, unsigned int val);
void gicd_write_nsacr(uintptr_t base, unsigned int id, unsigned int val);
void gicd_write_spendsgir(uintptr_t base, unsigned int id, unsigned int val);
void gicd_write_cpendsgir(uintptr_t base, unsigned int id, unsigned int val);
void gicd_write_itargetsr(uintptr_t base, unsigned int id, unsigned int val);
/*******************************************************************************
* GIC Distributor function prototypes for accessing the GIC registers

3
drivers/arm/gic/v2/gicv2_helpers.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -9,6 +9,7 @@
#include <assert.h>
#include <debug.h>
#include <gic_common.h>
#include <gicv2.h>
#include <interrupt_props.h>
#include "../common/gic_common_private.h"
#include "gicv2_private.h"

4
drivers/arm/gic/v2/gicv2_main.c
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -22,7 +22,7 @@ static const gicv2_driver_data_t *driver_data;
* spinlock are used either at boot time (when only a single CPU is active), or
* when the system is fully coherent.
*/
spinlock_t gic_lock;
static spinlock_t gic_lock;
/*******************************************************************************
* Enable secure interrupts and use FIQs to route them. Disable legacy bypass

4
drivers/arm/gic/v3/gicv3_main.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -21,7 +21,7 @@ static unsigned int gicv2_compat;
* spinlock are used either at boot time (when only a single CPU is active), or
* when the system is fully coherent.
*/
spinlock_t gic_lock;
static spinlock_t gic_lock;
/*
* Redistributor power operations are weakly bound so that they can be

4
drivers/arm/gic/v3/gicv3_private.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -79,6 +79,8 @@ void gicd_clr_igrpmodr(uintptr_t base, unsigned int id);
void gicr_clr_igrpmodr0(uintptr_t base, unsigned int id);
void gicr_clr_igroupr0(uintptr_t base, unsigned int id);
void gicr_set_ipriorityr(uintptr_t base, unsigned int id, unsigned int pri);
void gicr_set_icfgr0(uintptr_t base, unsigned int id, unsigned int cfg);
void gicr_set_icfgr1(uintptr_t base, unsigned int id, unsigned int cfg);
/*******************************************************************************
* Private GICv3 helper function prototypes

2
drivers/arm/tzc/tzc400.c
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@ -34,7 +34,7 @@ typedef struct tzc400_instance {
uint8_t num_regions;
} tzc400_instance_t;
tzc400_instance_t tzc400;
static tzc400_instance_t tzc400;
static inline unsigned int _tzc400_read_build_config(uintptr_t base)
{

6
drivers/arm/tzc/tzc_common_private.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -93,7 +93,7 @@
* It is used to program region 0 ATTRIBUTES and ACCESS register.
*/
#define DEFINE_TZC_COMMON_CONFIGURE_REGION0(fn_name) \
void _tzc##fn_name##_configure_region0(uintptr_t base, \
static void _tzc##fn_name##_configure_region0(uintptr_t base, \
tzc_region_attributes_t sec_attr, \
unsigned int ns_device_access) \
{ \
@ -124,7 +124,7 @@
* that function).
*/
#define DEFINE_TZC_COMMON_CONFIGURE_REGION(fn_name) \
void _tzc##fn_name##_configure_region(uintptr_t base, \
static void _tzc##fn_name##_configure_region(uintptr_t base, \
unsigned int filters, \
int region_no, \
unsigned long long region_base, \

23
drivers/delay_timer/delay_timer.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -12,7 +12,7 @@
/***********************************************************
* The delay timer implementation
***********************************************************/
static const timer_ops_t *ops;
static const timer_ops_t *timer_ops;
/***********************************************************
* Delay for the given number of microseconds. The driver must
@ -20,26 +20,27 @@ static const timer_ops_t *ops;
***********************************************************/
void udelay(uint32_t usec)
{
assert(ops != NULL &&
(ops->clk_mult != 0) &&
(ops->clk_div != 0) &&
(ops->get_timer_value != NULL));
assert(timer_ops != NULL &&
(timer_ops->clk_mult != 0) &&
(timer_ops->clk_div != 0) &&
(timer_ops->get_timer_value != NULL));
uint32_t start, delta, total_delta;
assert(usec < UINT32_MAX / ops->clk_div);
assert(usec < UINT32_MAX / timer_ops->clk_div);
start = ops->get_timer_value();
start = timer_ops->get_timer_value();
/* Add an extra tick to avoid delaying less than requested. */
total_delta = div_round_up(usec * ops->clk_div, ops->clk_mult) + 1;
total_delta =
div_round_up(usec * timer_ops->clk_div, timer_ops->clk_mult) + 1;
do {
/*
* If the timer value wraps around, the subtraction will
* overflow and it will still give the correct result.
*/
delta = start - ops->get_timer_value(); /* Decreasing counter */
delta = start - timer_ops->get_timer_value(); /* Decreasing counter */
} while (delta < total_delta);
}
@ -64,5 +65,5 @@ void timer_init(const timer_ops_t *ops_ptr)
(ops_ptr->clk_div != 0) &&
(ops_ptr->get_timer_value != NULL));
ops = ops_ptr;
timer_ops = ops_ptr;
}

2
drivers/io/io_fip.c
View File

@ -69,7 +69,7 @@ static inline int is_valid_header(fip_toc_header_t *header)
/* Identify the device type as a virtual driver */
io_type_t device_type_fip(void)
static io_type_t device_type_fip(void)
{
return IO_TYPE_FIRMWARE_IMAGE_PACKAGE;
}

5
drivers/io/io_memmap.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -7,6 +7,7 @@
#include <assert.h>
#include <debug.h>
#include <io_driver.h>
#include <io_memmap.h>
#include <io_storage.h>
#include <string.h>
#include <utils.h>
@ -28,7 +29,7 @@ typedef struct {
static file_state_t current_file = {0};
/* Identify the device type as memmap */
io_type_t device_type_memmap(void)
static io_type_t device_type_memmap(void)
{
return IO_TYPE_MEMMAP;
}

3
drivers/io/io_semihosting.c
View File

@ -1,11 +1,12 @@
/*
* Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <assert.h>
#include <io_driver.h>
#include <io_semihosting.h>
#include <io_storage.h>
#include <semihosting.h>

21
include/bl1/bl1.h
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@ -64,6 +64,27 @@
#ifndef __ASSEMBLY__
#include <cassert.h>
struct entry_point_info;
register_t bl1_smc_wrapper(uint32_t smc_fid,
void *cookie,
void *handle,
unsigned int flags);
register_t bl1_smc_handler(unsigned int smc_fid,
register_t x1,
register_t x2,
register_t x3,
register_t x4,
void *cookie,
void *handle,
unsigned int flags);
void bl1_print_next_bl_ep_info(const struct entry_point_info *bl_ep_info);
void bl1_main(void);
void bl1_plat_prepare_exit(entry_point_info_t *ep_info);
/*
* Check if the total number of FWU SMC calls are as expected.
*/

15
include/bl2/bl2.h Normal file
View File

@ -0,0 +1,15 @@
/*
* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef BL2_H__
#define BL2_H__
struct entry_point_info;
void bl2_main(void);
struct entry_point_info *bl2_load_images(void);
#endif /* BL2_H__ */

12
include/bl2u/bl2u.h Normal file
View File

@ -0,0 +1,12 @@
/*
* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef BL2_H__
#define BL2_H__
void bl2u_main(void);
#endif /* BL2_H__ */

8
include/bl31/bl31.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -13,10 +13,12 @@
* Function prototypes
******************************************************************************/
void bl31_next_el_arch_setup(uint32_t security_state);
void bl31_set_next_image_type(uint32_t type);
void bl31_set_next_image_type(uint32_t security_state);
uint32_t bl31_get_next_image_type(void);
void bl31_prepare_next_image_entry(void);
void bl31_register_bl32_init(int32_t (*)(void));
void bl31_register_bl32_init(int32_t (*func)(void));
void bl31_warm_entrypoint(void);
void bl31_main(void);
void bl31_lib_init(void);
#endif /* __BL31_H__ */

2
include/bl31/interrupt_mgmt.h
View File

@ -124,7 +124,7 @@ int32_t set_routing_model(uint32_t type, uint32_t flags);
int32_t register_interrupt_type_handler(uint32_t type,
interrupt_type_handler_t handler,
uint32_t flags);
interrupt_type_handler_t get_interrupt_type_handler(uint32_t interrupt_type);
interrupt_type_handler_t get_interrupt_type_handler(uint32_t type);
int disable_intr_rm_local(uint32_t type, uint32_t security_state);
int enable_intr_rm_local(uint32_t type, uint32_t security_state);

4
include/common/bl_common.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -210,7 +210,6 @@ int load_auth_image(unsigned int image_id, image_info_t *image_data);
#else
uintptr_t page_align(uintptr_t, unsigned);
int load_image(meminfo_t *mem_layout,
unsigned int image_id,
uintptr_t image_base,
@ -230,6 +229,7 @@ extern const char build_message[];
extern const char version_string[];
void print_entry_point_info(const entry_point_info_t *ep_info);
uintptr_t page_align(uintptr_t value, unsigned dir);
#endif /*__ASSEMBLY__*/

5
include/common/desc_image_load.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -19,6 +19,9 @@ typedef struct bl_mem_params_node {
bl_params_node_t params_node_mem;
} bl_mem_params_node_t;
extern bl_mem_params_node_t *bl_mem_params_desc_ptr;
extern unsigned int bl_mem_params_desc_num;
/*
* Macro to register list of BL image descriptors,
* defined as an array of bl_mem_params_node_t.

4
include/common/runtime_svc.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -126,5 +126,7 @@ extern uintptr_t __RT_SVC_DESCS_START__;
extern uintptr_t __RT_SVC_DESCS_END__;
void init_crash_reporting(void);
extern uint8_t rt_svc_descs_indices[MAX_RT_SVCS];
#endif /*__ASSEMBLY__*/
#endif /* __RUNTIME_SVC_H__ */

4
include/drivers/arm/gicv3.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -402,7 +402,7 @@ void gicv3_disable_interrupt(unsigned int id, unsigned int proc_num);
void gicv3_set_interrupt_priority(unsigned int id, unsigned int proc_num,
unsigned int priority);
void gicv3_set_interrupt_type(unsigned int id, unsigned int proc_num,
unsigned int group);
unsigned int type);
void gicv3_raise_secure_g0_sgi(int sgi_num, u_register_t target);
void gicv3_set_spi_routing(unsigned int id, unsigned int irm,
u_register_t mpidr);

4
include/drivers/arm/tzc400.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -118,7 +118,7 @@ void tzc400_configure_region(unsigned int filters,
unsigned long long region_base,
unsigned long long region_top,
tzc_region_attributes_t sec_attr,
unsigned int ns_device_access);
unsigned int nsaid_permissions);
void tzc400_set_action(tzc_action_t action);
void tzc400_enable_filters(void);
void tzc400_disable_filters(void);

4
include/drivers/delay_timer.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -25,7 +25,7 @@ typedef struct timer_ops {
void mdelay(uint32_t msec);
void udelay(uint32_t usec);
void timer_init(const timer_ops_t *ops);
void timer_init(const timer_ops_t *ops_ptr);
#endif /* __DELAY_TIMER_H__ */

2
include/drivers/io/io_storage.h
View File

@ -70,7 +70,7 @@ typedef struct io_block_spec {
/* Open a connection to a device */
int io_dev_open(const struct io_dev_connector *dev_con,
const uintptr_t dev_spec,
uintptr_t *dev_handle);
uintptr_t *handle);
/* Initialise a device explicitly - to permit lazy initialisation or

5
include/lib/cpus/errata_report.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -20,6 +20,9 @@ void print_errata_status(void);
static inline void print_errata_status(void) {}
#endif
void errata_print_msg(unsigned int status, const char *cpu, const char *id);
int errata_needs_reporting(spinlock_t *lock, uint32_t *reported);
#endif /* __ASSEMBLY__ */
/* Errata status */

4
include/lib/el3_runtime/cpu_data.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -102,6 +102,8 @@ typedef struct cpu_data {
#endif
} __aligned(CACHE_WRITEBACK_GRANULE) cpu_data_t;
extern cpu_data_t percpu_data[PLATFORM_CORE_COUNT];
#if CRASH_REPORTING
/* verify assembler offsets match data structures */
CASSERT(CPU_DATA_CRASH_BUF_OFFSET == __builtin_offsetof

7
include/lib/el3_runtime/pubsub.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -49,9 +49,12 @@
* Have the function func called back when the specified event happens. This
* macro places the function address into the pubsub section, which is picked up
* and invoked by the invoke_pubsubs() function via. the PUBLISH_EVENT* macros.
*
* The extern declaration is there to satisfy MISRA C-2012 rule 8.4.
*/
#define SUBSCRIBE_TO_EVENT(event, func) \
pubsub_cb_t __cb_func_##func##event __pubsub_section(event) = func
extern pubsub_cb_t __cb_func_##func##event __pubsub_section(event); \
pubsub_cb_t __cb_func_##func##event __pubsub_section(event) = (func)
/*
* Iterate over subscribed handlers for a defined event. 'event' is the name of

4
include/lib/pmf/pmf.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -162,7 +162,7 @@
int pmf_get_timestamp_smc(unsigned int tid,
u_register_t mpidr,
unsigned int flags,
unsigned long long *ts);
unsigned long long *ts_value);
int pmf_setup(void);
uintptr_t pmf_smc_handler(unsigned int smc_fid,
u_register_t x1,

19
include/lib/pmf/pmf_helpers.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -45,8 +45,11 @@ typedef struct pmf_svc_desc {
/*
* Convenience macro to allocate memory for a PMF service.
*
* The extern declaration is there to satisfy MISRA C-2012 rule 8.4.
*/
#define PMF_ALLOCATE_TIMESTAMP_MEMORY(_name, _total_id) \
extern unsigned long long pmf_ts_mem_ ## _name[_total_id]; \
unsigned long long pmf_ts_mem_ ## _name[_total_id] \
__aligned(CACHE_WRITEBACK_GRANULE) \
__section("pmf_timestamp_array") \
@ -60,8 +63,13 @@ typedef struct pmf_svc_desc {
/*
* Convenience macros for capturing time-stamp.
*
* The extern declaration is there to satisfy MISRA C-2012 rule 8.4.
*/
#define PMF_DEFINE_CAPTURE_TIMESTAMP(_name, _flags) \
void pmf_capture_timestamp_ ## _name( \
unsigned int tid, \
unsigned long long ts); \
void pmf_capture_timestamp_ ## _name( \
unsigned int tid, \
unsigned long long ts) \
@ -74,6 +82,9 @@ typedef struct pmf_svc_desc {
if ((_flags) & PMF_DUMP_ENABLE) \
__pmf_dump_timestamp(tid, ts); \
} \
void pmf_capture_timestamp_with_cache_maint_ ## _name( \
unsigned int tid, \
unsigned long long ts); \
void pmf_capture_timestamp_with_cache_maint_ ## _name( \
unsigned int tid, \
unsigned long long ts) \
@ -89,8 +100,12 @@ typedef struct pmf_svc_desc {
/*
* Convenience macros for retrieving time-stamp.
*
* The extern declaration is there to satisfy MISRA C-2012 rule 8.4.
*/
#define PMF_DEFINE_GET_TIMESTAMP(_name) \
unsigned long long pmf_get_timestamp_by_index_ ## _name( \
unsigned int tid, unsigned int cpuid, unsigned int flags);\
unsigned long long pmf_get_timestamp_by_index_ ## _name( \
unsigned int tid, unsigned int cpuid, unsigned int flags)\
{ \
@ -98,6 +113,8 @@ typedef struct pmf_svc_desc {
uintptr_t base_addr = (uintptr_t) pmf_ts_mem_ ## _name; \
return __pmf_get_timestamp(base_addr, tid, cpuid, flags);\
} \
unsigned long long pmf_get_timestamp_by_mpidr_ ## _name( \
unsigned int tid, u_register_t mpidr, unsigned int flags);\
unsigned long long pmf_get_timestamp_by_mpidr_ ## _name( \
unsigned int tid, u_register_t mpidr, unsigned int flags)\
{ \

6
include/plat/arm/common/plat_arm.h
View File

@ -125,7 +125,7 @@ int arm_validate_ns_entrypoint(uintptr_t entrypoint);
void arm_system_pwr_domain_save(void);
void arm_system_pwr_domain_resume(void);
void arm_program_trusted_mailbox(uintptr_t address);
int arm_psci_read_mem_protect(int *val);
int arm_psci_read_mem_protect(int *enabled);
int arm_nor_psci_write_mem_protect(int val);
void arm_nor_psci_do_mem_protect(void);
int arm_psci_mem_protect_chk(uintptr_t base, u_register_t length);
@ -237,4 +237,8 @@ int arm_execution_state_switch(unsigned int smc_fid,
uint32_t cookie_lo,
void *handle);
/* global variables */
extern plat_psci_ops_t plat_arm_psci_pm_ops;
extern const mmap_region_t plat_arm_mmap[];
#endif /* __PLAT_ARM_H__ */

8
include/plat/arm/css/common/css_pm.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -33,4 +33,10 @@ void css_cpu_standby(plat_local_state_t cpu_state);
void css_get_sys_suspend_power_state(psci_power_state_t *req_state);
int css_node_hw_state(u_register_t mpidr, unsigned int power_level);
/*
* This mapping array has to be exported by the platform. Each element at
* a given index maps that core to an SCMI power domain.
*/
extern const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[];
#endif /* __CSS_PM_H__ */

6
include/plat/common/platform.h
View File

@ -301,7 +301,7 @@ struct entry_point_info *bl31_plat_get_next_image_ep_info(uint32_t type);
* Mandatory PSCI functions (BL31)
******************************************************************************/
int plat_setup_psci_ops(uintptr_t sec_entrypoint,
const struct plat_psci_ops **);
const struct plat_psci_ops **psci_ops);
const unsigned char *plat_get_power_domain_tree_desc(void);
/*******************************************************************************
@ -311,7 +311,7 @@ void plat_psci_stat_accounting_start(const psci_power_state_t *state_info);
void plat_psci_stat_accounting_stop(const psci_power_state_t *state_info);
u_register_t plat_psci_stat_get_residency(unsigned int lvl,
const psci_power_state_t *state_info,
int last_cpu_index);
int last_cpu_idx);
plat_local_state_t plat_get_target_pwr_state(unsigned int lvl,
const plat_local_state_t *states,
unsigned int ncpu);
@ -386,12 +386,14 @@ int platform_setup_pm(const plat_pm_ops_t **);
unsigned int plat_get_aff_count(unsigned int, unsigned long);
unsigned int plat_get_aff_state(unsigned int, unsigned long);
#else /* __ENABLE_PLAT_COMPAT__ */
/*
* The below function enable Trusted Firmware components like SPDs which
* haven't migrated to the new platform API to compile on platforms which
* have the compatibility layer disabled.
*/
unsigned int platform_core_pos_helper(unsigned long mpidr);
unsigned int platform_get_core_pos(unsigned long mpidr) __deprecated;
#endif /* __ENABLE_PLAT_COMPAT__ */

1
lib/extensions/spe/spe.c
View File

@ -7,6 +7,7 @@
#include <arch.h>
#include <arch_helpers.h>
#include <pubsub.h>
#include <spe.h>
/*
* The assembler does not yet understand the psb csync mnemonic

6
lib/psci/psci_private.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -218,7 +218,7 @@ void psci_acquire_pwr_domain_locks(unsigned int end_pwrlvl,
void psci_release_pwr_domain_locks(unsigned int end_pwrlvl,
unsigned int cpu_idx);
int psci_validate_suspend_req(const psci_power_state_t *state_info,
unsigned int is_power_down_state_req);
unsigned int is_power_down_state);
unsigned int psci_find_max_off_lvl(const psci_power_state_t *state_info);
unsigned int psci_find_target_suspend_lvl(const psci_power_state_t *state_info);
void psci_set_pwr_domains_to_run(unsigned int end_pwrlvl);
@ -248,7 +248,7 @@ int psci_do_cpu_off(unsigned int end_pwrlvl);
void psci_cpu_suspend_start(entry_point_info_t *ep,
unsigned int end_pwrlvl,
psci_power_state_t *state_info,
unsigned int is_power_down_state_req);
unsigned int is_power_down_state);
void psci_cpu_suspend_finish(unsigned int cpu_idx,
psci_power_state_t *state_info);

3
lib/stdlib/abort.c
View File

@ -1,10 +1,11 @@
/*
* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <debug.h>
#include <stdlib.h>
/*
* This is a basic implementation. This could be improved.

3
lib/stdlib/exit.c
View File

@ -1,10 +1,11 @@
/*
* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <debug.h>
#include <stdlib.h>
void exit(int v)
{

3
lib/stdlib/sscanf.c
View File

@ -1,9 +1,10 @@
/*
* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <stdio.h>
#include <sys/cdefs.h>
/*

2
lib/xlat_tables_v2/xlat_tables_internal.c
View File

@ -115,7 +115,7 @@ static uint64_t *xlat_table_get_empty(xlat_ctx_t *ctx)
/*
* Returns a block/page table descriptor for the given level and attributes.
*/
uint64_t xlat_desc(const xlat_ctx_t *ctx, mmap_attr_t attr,
static uint64_t xlat_desc(const xlat_ctx_t *ctx, mmap_attr_t attr,
unsigned long long addr_pa, int level)
{
uint64_t desc;

4
lib/xlat_tables_v2/xlat_tables_private.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -83,7 +83,7 @@ unsigned long long xlat_arch_get_max_supported_pa(void);
/* Enable MMU and configure it to use the specified translation tables. */
void enable_mmu_arch(unsigned int flags, uint64_t *base_table,
unsigned long long pa, uintptr_t max_va);
unsigned long long max_pa, uintptr_t max_va);
/*
* Return 1 if the MMU of the translation regime managed by the given xlat_ctx_t

16
plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -40,13 +40,13 @@
/*******************************************************************************
* Function & variable prototypes
******************************************************************************/
void fvp_pwrc_write_pcoffr(u_register_t);
void fvp_pwrc_write_ppoffr(u_register_t);
void fvp_pwrc_write_pponr(u_register_t);
void fvp_pwrc_set_wen(u_register_t);
void fvp_pwrc_clr_wen(u_register_t);
unsigned int fvp_pwrc_read_psysr(u_register_t);
unsigned int fvp_pwrc_get_cpu_wkr(u_register_t);
void fvp_pwrc_write_pcoffr(u_register_t mpidr);
void fvp_pwrc_write_ppoffr(u_register_t mpidr);
void fvp_pwrc_write_pponr(u_register_t mpidr);
void fvp_pwrc_set_wen(u_register_t mpidr);
void fvp_pwrc_clr_wen(u_register_t mpidr);
unsigned int fvp_pwrc_read_psysr(u_register_t mpidr);
unsigned int fvp_pwrc_get_cpu_wkr(u_register_t mpidr);
#endif /*__ASSEMBLY__*/

3
plat/arm/board/fvp/fvp_bl1_setup.c
View File

@ -1,10 +1,11 @@
/*
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <plat_arm.h>
#include <platform.h>
#include <tbbr_img_def.h>
#include "fvp_private.h"

3
plat/arm/board/fvp/fvp_bl2u_setup.c
View File

@ -1,10 +1,11 @@
/*
* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <plat_arm.h>
#include <platform.h>
#include "fvp_def.h"
#include "fvp_private.h"

3
plat/arm/board/fvp/fvp_common.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -18,6 +18,7 @@
#include <secure_partition.h>
#include <v2m_def.h>
#include "../fvp_def.h"
#include "fvp_private.h"
/* Defines for GIC Driver build time selection */
#define FVP_GICV2 1

3
plat/arm/board/fvp/fvp_err.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -9,6 +9,7 @@
#include <debug.h>
#include <errno.h>
#include <norflash.h>
#include <platform.h>
#include <stdint.h>
/*

23
plat/arm/board/fvp/fvp_pm.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -16,6 +16,7 @@
#include <psci.h>
#include <spe.h>
#include <v2m_def.h>
#include "../../../../drivers/arm/gic/v3/gicv3_private.h"
#include "drivers/pwrc/fvp_pwrc.h"
#include "fvp_def.h"
#include "fvp_private.h"
@ -74,10 +75,10 @@ static void fvp_cluster_pwrdwn_common(void)
* support SYSTEM_SUSPEND and it is `faked` in firmware. Hence, for wake up
* from `fake` system suspend the GIC must not be powered off.
*/
void arm_gicv3_distif_pre_save(unsigned int proc_num)
void arm_gicv3_distif_pre_save(unsigned int rdist_proc_num)
{}
void arm_gicv3_distif_post_restore(unsigned int proc_num)
void arm_gicv3_distif_post_restore(unsigned int rdist_proc_num)
{}
static void fvp_power_domain_on_finish_common(const psci_power_state_t *target_state)
@ -123,7 +124,7 @@ static void fvp_power_domain_on_finish_common(const psci_power_state_t *target_s
/*******************************************************************************
* FVP handler called when a CPU is about to enter standby.
******************************************************************************/
void fvp_cpu_standby(plat_local_state_t cpu_state)
static void fvp_cpu_standby(plat_local_state_t cpu_state)
{
assert(cpu_state == ARM_LOCAL_STATE_RET);
@ -140,7 +141,7 @@ void fvp_cpu_standby(plat_local_state_t cpu_state)
* FVP handler called when a power domain is about to be turned on. The
* mpidr determines the CPU to be turned on.
******************************************************************************/
int fvp_pwr_domain_on(u_register_t mpidr)
static int fvp_pwr_domain_on(u_register_t mpidr)
{
int rc = PSCI_E_SUCCESS;
unsigned int psysr;
@ -162,7 +163,7 @@ int fvp_pwr_domain_on(u_register_t mpidr)
* FVP handler called when a power domain is about to be turned off. The
* target_state encodes the power state that each level should transition to.
******************************************************************************/
void fvp_pwr_domain_off(const psci_power_state_t *target_state)
static void fvp_pwr_domain_off(const psci_power_state_t *target_state)
{
assert(target_state->pwr_domain_state[ARM_PWR_LVL0] ==
ARM_LOCAL_STATE_OFF);
@ -192,7 +193,7 @@ void fvp_pwr_domain_off(const psci_power_state_t *target_state)
* FVP handler called when a power domain is about to be suspended. The
* target_state encodes the power state that each level should transition to.
******************************************************************************/
void fvp_pwr_domain_suspend(const psci_power_state_t *target_state)
static void fvp_pwr_domain_suspend(const psci_power_state_t *target_state)
{
unsigned long mpidr;
@ -241,7 +242,7 @@ void fvp_pwr_domain_suspend(const psci_power_state_t *target_state)
* being turned off earlier. The target_state encodes the low power state that
* each level has woken up from.
******************************************************************************/
void fvp_pwr_domain_on_finish(const psci_power_state_t *target_state)
static void fvp_pwr_domain_on_finish(const psci_power_state_t *target_state)
{
fvp_power_domain_on_finish_common(target_state);
@ -259,7 +260,7 @@ void fvp_pwr_domain_on_finish(const psci_power_state_t *target_state)
* TODO: At the moment we reuse the on finisher and reinitialize the secure
* context. Need to implement a separate suspend finisher.
******************************************************************************/
void fvp_pwr_domain_suspend_finish(const psci_power_state_t *target_state)
static void fvp_pwr_domain_suspend_finish(const psci_power_state_t *target_state)
{
/*
* Nothing to be done on waking up from retention from CPU level.
@ -341,13 +342,15 @@ static int fvp_node_hw_state(u_register_t target_cpu,
* layer. The `fake` SYSTEM_SUSPEND allows us to validate some of the driver
* save and restore sequences on FVP.
*/
void fvp_get_sys_suspend_power_state(psci_power_state_t *req_state)
#if !ARM_BL31_IN_DRAM
static void fvp_get_sys_suspend_power_state(psci_power_state_t *req_state)
{
unsigned int i;
for (i = ARM_PWR_LVL0; i <= PLAT_MAX_PWR_LVL; i++)
req_state->pwr_domain_state[i] = ARM_LOCAL_STATE_OFF;
}
#endif
/*******************************************************************************
* Handler to filter PSCI requests.

5
plat/arm/board/fvp/fvp_topology.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -8,11 +8,12 @@
#include <arm_config.h>
#include <cassert.h>
#include <plat_arm.h>
#include <platform.h>
#include <platform_def.h>
#include "drivers/pwrc/fvp_pwrc.h"
/* The FVP power domain tree descriptor */
unsigned char fvp_power_domain_tree_desc[FVP_CLUSTER_COUNT + 2];
static unsigned char fvp_power_domain_tree_desc[FVP_CLUSTER_COUNT + 2];
CASSERT(FVP_CLUSTER_COUNT && FVP_CLUSTER_COUNT <= 256, assert_invalid_fvp_cluster_count);

3
plat/arm/board/fvp/fvp_trusted_boot.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -7,6 +7,7 @@
#include <assert.h>
#include <stdint.h>
#include <string.h>
#include <platform.h>
#include <tbbr_oid.h>
#include "fvp_def.h"

3
plat/arm/board/juno/juno_err.c
View File

@ -1,11 +1,12 @@
/*
* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <arch_helpers.h>
#include <errno.h>
#include <platform.h>
#include <v2m_def.h>
#define V2M_SYS_NVFLAGS_ADDR (V2M_SYSREGS_BASE + V2M_SYS_NVFLAGS)

6
plat/arm/board/juno/juno_topology.c
View File

@ -1,11 +1,13 @@
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <arm_def.h>
#include <css_pm.h>
#include <plat_arm.h>
#include <platform.h>
#include "juno_def.h"
/*
@ -23,7 +25,7 @@
* i.e. CLUSTER1 CPUs are allocated indices from 0 to 3 and the higher
* indices for CLUSTER0 CPUs.
*/
const unsigned char juno_power_domain_tree_desc[] = {
static const unsigned char juno_power_domain_tree_desc[] = {
/* No of root nodes */
JUNO_PWR_DOMAINS_AT_MAX_PWR_LVL,
/* No of children for the root node */

3
plat/arm/board/juno/juno_trng.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -8,6 +8,7 @@
#include <mmio.h>
#include <string.h>
#include <utils_def.h>
#include "juno_decl.h"
#include "juno_def.h"
#define NSAMPLE_CLOCKS 1 /* min 1 cycle, max 231 cycles */

2
plat/arm/common/arm_bl1_setup.c
View File

@ -7,9 +7,11 @@
#include <arch.h>
#include <arm_def.h>
#include <arm_xlat_tables.h>
#include <bl1.h>
#include <bl_common.h>
#include <console.h>
#include <plat_arm.h>
#include <platform.h>
#include <platform_def.h>
#include <sp805.h>
#include <utils.h>

3
plat/arm/common/arm_bl2u_setup.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -10,6 +10,7 @@
#include <console.h>
#include <plat_arm.h>
#include <platform_def.h>
#include <platform.h>
#include <string.h>
/* Weak definitions may be overridden in specific ARM standard platform */

3
plat/arm/common/arm_common.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -11,6 +11,7 @@
#include <mmio.h>
#include <plat_arm.h>
#include <platform_def.h>
#include <platform.h>
#include <secure_partition.h>
extern const mmap_region_t plat_arm_mmap[];

8
plat/arm/common/arm_gicv3.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -35,8 +35,8 @@ static const interrupt_prop_t arm_interrupt_props[] = {
* We save and restore the GICv3 context on system suspend. Allocate the
* data in the designated EL3 Secure carve-out memory
*/
gicv3_redist_ctx_t rdist_ctx __section("arm_el3_tzc_dram");
gicv3_dist_ctx_t dist_ctx __section("arm_el3_tzc_dram");
static gicv3_redist_ctx_t rdist_ctx __section("arm_el3_tzc_dram");
static gicv3_dist_ctx_t dist_ctx __section("arm_el3_tzc_dram");
/*
* MPIDR hashing function for translating MPIDRs read from GICR_TYPER register
@ -58,7 +58,7 @@ static unsigned int arm_gicv3_mpidr_hash(u_register_t mpidr)
return plat_arm_calc_core_pos(mpidr);
}
const gicv3_driver_data_t arm_gic_data = {
static const gicv3_driver_data_t arm_gic_data __unused = {
.gicd_base = PLAT_ARM_GICD_BASE,
.gicr_base = PLAT_ARM_GICR_BASE,
.interrupt_props = arm_interrupt_props,

2
plat/arm/common/arm_io_storage.c
View File

@ -10,6 +10,8 @@
#include <io_fip.h>
#include <io_memmap.h>
#include <io_storage.h>
#include <plat_arm.h>
#include <platform.h>
#include <platform_def.h>
#include <string.h>
#include <utils.h>

4
plat/arm/common/arm_nor_psci_mem_protect.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -12,7 +12,7 @@
#include <psci.h>
#include <utils.h>
mem_region_t arm_ram_ranges[] = {
static mem_region_t arm_ram_ranges[] = {
{ARM_NS_DRAM1_BASE, ARM_NS_DRAM1_SIZE},
#ifdef AARCH64
{ARM_DRAM2_BASE, ARM_DRAM2_SIZE},

3
plat/arm/common/arm_tzc400.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -7,6 +7,7 @@
#include <arm_def.h>
#include <arm_spm_def.h>
#include <debug.h>
#include <plat_arm.h>
#include <platform_def.h>
#include <tzc400.h>

3
plat/arm/css/common/css_bl1_setup.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -7,6 +7,7 @@
#include <bl_common.h>
#include <debug.h>
#include <plat_arm.h>
#include <platform.h>
#include <soc_css.h>
void bl1_platform_setup(void)

3
plat/arm/css/common/css_bl2u_setup.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -7,6 +7,7 @@
#include <bl_common.h>
#include <debug.h>
#include <plat_arm.h>
#include <platform.h>
#include "../drivers/scp/css_scp.h"
/* Weak definition may be overridden in specific CSS based platform */

3
plat/arm/css/common/css_topology.c
View File

@ -1,10 +1,11 @@
/*
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <plat_arm.h>
#include <platform.h>
#if ARM_PLAT_MT
#pragma weak plat_arm_get_cpu_pe_count

3
plat/arm/css/drivers/scp/css_bom_bootloader.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -12,6 +12,7 @@
#include <stdint.h>
#include "../scpi/css_mhu.h"
#include "../scpi/css_scpi.h"
#include "css_scp.h"
/* ID of the MHU slot used for the BOM protocol */
#define BOM_MHU_SLOT_ID 0

10
plat/arm/css/drivers/scp/css_pm_scmi.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -61,17 +61,11 @@ typedef enum {
scmi_power_state_sleep = 2,
} scmi_power_state_t;
/*
* This mapping array has to be exported by the platform. Each element at
* a given index maps that core to an SCMI power domain.
*/
extern uint32_t plat_css_core_pos_to_scmi_dmn_id_map[];
/*
* The global handle for invoking the SCMI driver APIs after the driver
* has been initialized.
*/
void *scmi_handle;
static void *scmi_handle;
/* The SCMI channel global object */
static scmi_channel_t scmi_channel;

3
plat/arm/soc/common/soc_css_security.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -8,6 +8,7 @@
#include <mmio.h>
#include <nic_400.h>
#include <platform_def.h>
#include <soc_css.h>
#include <soc_css_def.h>
void soc_css_init_nic400(void)

2
plat/common/plat_bl_common.c
View File

@ -36,6 +36,7 @@ void bl2_plat_preload_setup(void)
{
}
#if LOAD_IMAGE_V2
int bl2_plat_handle_pre_image_load(unsigned int image_id)
{
return 0;
@ -45,6 +46,7 @@ int bl2_plat_handle_post_image_load(unsigned int image_id)
{
return 0;
}
#endif
int plat_try_next_boot_source(void)
{

2
services/arm_arch_svc/arm_arch_svc_setup.c
View File

@ -33,7 +33,7 @@ static int32_t smccc_arch_features(u_register_t arg)
/*
* Top-level Arm Architectural Service SMC handler.
*/
uintptr_t arm_arch_svc_smc_handler(uint32_t smc_fid,
static uintptr_t arm_arch_svc_smc_handler(uint32_t smc_fid,
u_register_t x1,
u_register_t x2,
u_register_t x3,

4
services/std_svc/std_svc_setup.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -58,7 +58,7 @@ static int32_t std_svc_setup(void)
* Top-level Standard Service SMC handler. This handler will in turn dispatch
* calls to PSCI SMC handler
*/
uintptr_t std_svc_smc_handler(uint32_t smc_fid,
static uintptr_t std_svc_smc_handler(uint32_t smc_fid,
u_register_t x1,
u_register_t x2,
u_register_t x3,