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Cortex-A15: Implement workaround for errata 816470 

Change-Id: I9755252725be25bfd0147839d7df56888424ff84
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
This commit is contained in:
Ambroise Vincent 2019-03-04 16:56:26 +00:00
parent c48d02bade
commit 75a1ada95e
3 changed files with 36 additions and 1 deletions
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5
docs/cpu-specific-build-macros.rst
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@ -71,6 +71,11 @@ for it to specify which errata workarounds should be enabled or not.
The value of the build flags is 0 by default, that is, disabled. A value of 1
will enable it.
For Cortex-A15, the following errata build flags are defined :
- ``ERRATA_A15_816470``: This applies errata 816470 workaround to Cortex-A15
CPU. This needs to be enabled only for revision >= r3p0 of the CPU.
For Cortex-A53, the following errata build flags are defined :
- ``ERRATA_A53_819472``: This applies errata 819472 workaround to all

24
lib/cpus/aarch32/cortex_a15.S
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -29,6 +29,13 @@ func cortex_a15_disable_smp
bic r0, #CORTEX_A15_ACTLR_SMP_BIT
stcopr r0, ACTLR
isb
#if ERRATA_A15_816470
/*
* Invalidate any TLB address
*/
mov r0, #0
stcopr r0, TLBIMVA
#endif
dsb sy
bx lr
endfunc cortex_a15_disable_smp
@ -41,6 +48,20 @@ func cortex_a15_enable_smp
bx lr
endfunc cortex_a15_enable_smp
/* ----------------------------------------------------
* Errata Workaround for Cortex A15 Errata #816470.
* This applies only to revision >= r3p0 of Cortex A15.
* ----------------------------------------------------
*/
func check_errata_816470
/*
* Even though this is only needed for revision >= r3p0, it is always
* applied because of the low cost of the workaround.
*/
mov r0, #ERRATA_APPLIES
bx lr
endfunc check_errata_816470
func check_errata_cve_2017_5715
#if WORKAROUND_CVE_2017_5715
mov r0, #ERRATA_APPLIES
@ -64,6 +85,7 @@ func cortex_a15_errata_report
* Report all errata. The revision-variant information is passed to
* checking functions of each errata.
*/
report_errata ERRATA_A15_816470, cortex_a15, 816470
report_errata WORKAROUND_CVE_2017_5715, cortex_a15, cve_2017_5715
pop {r12, lr}

8
lib/cpus/cpu-ops.mk
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@ -53,6 +53,10 @@ endif
# These should be enabled by the platform if the erratum workaround needs to be
# applied.
# Flag to apply erratum 816470 workaround during power down. This erratum
# applies only to revision >= r3p0 of the Cortex A15 cpu.
ERRATA_A15_816470 ?=0
# Flag to apply erratum 819472 workaround during reset. This erratum applies
# only to revision <= r0p1 of the Cortex A53 cpu.
ERRATA_A53_819472 ?=0
@ -196,6 +200,10 @@ ERRATA_N1_1043202 ?=1
# higher DSU power consumption on idle.
ERRATA_DSU_936184 ?=0
# Process ERRATA_A15_816470 flag
$(eval $(call assert_boolean,ERRATA_A15_816470))
$(eval $(call add_define,ERRATA_A15_816470))
# Process ERRATA_A53_819472 flag
$(eval $(call assert_boolean,ERRATA_A53_819472))
$(eval $(call add_define,ERRATA_A53_819472))