Merge pull request #40 from athoelke/at/up-stacks-76-v2
Allocate single stacks for BL1 and BL2 (v2)
This commit is contained in:
commit
7640b47342
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@ -435,21 +435,12 @@ restore_scratch_registers_callee:
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*/
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func get_exception_stack
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mov x10, x30 // lr
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bl platform_get_core_pos
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add x0, x0, #1
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mov x1, #PCPU_EXCEPTION_STACK_SIZE
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mul x0, x0, x1
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ldr x1, =pcpu_exception_stack
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add x0, x1, x0
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get_mp_stack pcpu_exception_stack, PCPU_EXCEPTION_STACK_SIZE
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ret x10
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/* -----------------------------------------------------
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* Per-cpu exception stacks in normal memory.
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* -----------------------------------------------------
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*/
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.section tzfw_normal_stacks, "aw", %nobits; .align 6
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pcpu_exception_stack:
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/* Zero fill */
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.space (PLATFORM_CORE_COUNT * PCPU_EXCEPTION_STACK_SIZE), 0
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declare_stack pcpu_exception_stack, tzfw_normal_stacks, \
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PCPU_EXCEPTION_STACK_SIZE, PLATFORM_CORE_COUNT
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@ -34,4 +34,5 @@ vpath %.S ${PLAT_BL2_S_VPATH}
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# TSP source files specific to FVP platform
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BL32_SOURCES += bl32_plat_setup.c \
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platform_mp_stack.S \
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plat_common.c
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@ -81,7 +81,7 @@ for the firmware to work correctly.
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Each platform must export a header file of this name with the following
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constants defined. In the ARM FVP port, this file is found in
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[../plat/fvp/platform.h].
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[plat/fvp/platform.h].
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* **#define : PLATFORM_LINKER_FORMAT**
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@ -96,7 +96,14 @@ constants defined. In the ARM FVP port, this file is found in
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* **#define : PLATFORM_STACK_SIZE**
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Defines the normal stack memory available to each CPU. This constant is used
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by `platform_set_stack()`.
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by [plat/common/aarch64/platform_mp_stack.S] and
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[plat/common/aarch64/platform_up_stack.S].
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* **#define : PCPU_DV_MEM_STACK_SIZE**
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Defines the coherent stack memory available to each CPU. This constant is used
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by [plat/common/aarch64/platform_mp_stack.S] and
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[plat/common/aarch64/platform_up_stack.S].
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* **#define : FIRMWARE_WELCOME_STR**
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@ -192,21 +199,7 @@ constants defined. In the ARM FVP port, this file is found in
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The following mandatory modifications may be implemented in any file
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the implementer chooses. In the ARM FVP port, they are implemented in
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[../plat/fvp/aarch64/plat_common.c].
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* **Variable : unsigned char platform_normal_stacks[X][Y]**
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where X = PLATFORM_STACK_SIZE
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and Y = PLATFORM_CORE_COUNT
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Each platform must allocate a block of memory with Normal Cacheable, Write
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back, Write allocate and Inner Shareable attributes aligned to the size (in
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bytes) of the largest cache line amongst all caches implemented in the
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system. A pointer to this memory should be exported with the name
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`platform_normal_stacks`. This pointer is used by the common platform helper
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functions `platform_set_stack()` (to allocate a stack for each CPU in the
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platform) & `platform_get_stack()` (to return the base address of that
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stack) (see [../plat/common/aarch64/platform_helpers.S]).
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[plat/fvp/aarch64/plat_common.c].
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* **Function : uint64_t plat_get_syscnt_freq(void)**
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@ -216,6 +209,7 @@ the implementer chooses. In the ARM FVP port, they are implemented in
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In the ARM FVP port, it returns the base frequency of the system counter,
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which is retrieved from the first entry in the frequency modes table.
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2.2 Common optional modifications
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---------------------------------
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@ -253,13 +247,18 @@ certain operations like:
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* Flushing caches prior to powering down a CPU or cluster.
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Each BL stage allocates this coherent stack memory for each CPU in the
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`tzfw_coherent_mem` section. A pointer to this memory (`pcpu_dv_mem_stack`) is
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used by this function to allocate a coherent stack for each CPU. A CPU is
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identified by its `MPIDR`, which is passed as an argument to this function.
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`tzfw_coherent_mem` section.
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The size of the stack allocated to each CPU is specified by the constant
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This function sets the current stack pointer to the coherent stack that
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has been allocated for the CPU specified by MPIDR. For BL images that only
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require a stack for the primary CPU the parameter is ignored. The size of
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the stack allocated to each CPU is specified by the platform defined constant
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`PCPU_DV_MEM_STACK_SIZE`.
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Common implementations of this function for the UP and MP BL images are
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provided in [plat/common/aarch64/platform_up_stack.S] and
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[plat/common/aarch64/platform_mp_stack.S]
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### Function : platform_is_primary_cpu()
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@ -277,13 +276,15 @@ return value indicates that the CPU is the primary CPU.
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Argument : unsigned long
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Return : void
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This function uses the `platform_normal_stacks` pointer variable to allocate
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stacks to each CPU. Further details are given in the description of the
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`platform_normal_stacks` variable below. A CPU is identified by its `MPIDR`,
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which is passed as the argument.
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This function sets the current stack pointer to the normal memory stack that
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has been allocated for the CPU specificed by MPIDR. For BL images that only
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require a stack for the primary CPU the parameter is ignored. The size of
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the stack allocated to each CPU is specified by the platform defined constant
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`PLATFORM_STACK_SIZE`.
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The size of the stack allocated to each CPU is specified by the platform defined
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constant `PLATFORM_STACK_SIZE`.
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Common implementations of this function for the UP and MP BL images are
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provided in [plat/common/aarch64/platform_up_stack.S] and
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[plat/common/aarch64/platform_mp_stack.S]
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### Function : platform_get_stack()
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@ -291,13 +292,15 @@ constant `PLATFORM_STACK_SIZE`.
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Argument : unsigned long
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Return : unsigned long
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This function uses the `platform_normal_stacks` pointer variable to return the
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base address of the stack memory reserved for a CPU. Further details are given
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in the description of the `platform_normal_stacks` variable below. A CPU is
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identified by its `MPIDR`, which is passed as the argument.
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This function returns the base address of the normal memory stack that
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has been allocated for the CPU specificed by MPIDR. For BL images that only
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require a stack for the primary CPU the parameter is ignored. The size of
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the stack allocated to each CPU is specified by the platform defined constant
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`PLATFORM_STACK_SIZE`.
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The size of the stack allocated to each CPU is specified by the platform defined
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constant `PLATFORM_STACK_SIZE`.
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Common implementations of this function for the UP and MP BL images are
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provided in [plat/common/aarch64/platform_up_stack.S] and
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[plat/common/aarch64/platform_mp_stack.S]
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### Function : plat_report_exception()
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@ -319,7 +322,7 @@ The default implementation doesn't do anything, to avoid making assumptions
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about the way the platform displays its status information.
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This function receives the exception type as its argument. Possible values for
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exceptions types are listed in the [../include/runtime_svc.h] header file. Note
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exceptions types are listed in the [include/runtime_svc.h] header file. Note
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that these constants are not related to any architectural exception code; they
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are just an ARM Trusted Firmware convention.
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@ -933,7 +936,7 @@ handler routines for platform-specific power management actions by populating
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the passed pointer with a pointer to BL3-1's private `plat_pm_ops` structure.
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A description of each member of this structure is given below. Please refer to
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the ARM FVP specific implementation of these handlers in [../plat/fvp/plat_pm.c]
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the ARM FVP specific implementation of these handlers in [plat/fvp/plat_pm.c]
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as an example. A platform port may choose not implement some of the power
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management operations. For example, the ARM FVP port does not implement the
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`affinst_standby()` function.
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@ -1135,8 +1138,9 @@ _Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved._
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[User Guide]: user-guide.md
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[FreeBSD]: http://www.freebsd.org
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[../plat/common/aarch64/platform_helpers.S]: ../plat/common/aarch64/platform_helpers.S
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[../plat/fvp/platform.h]: ../plat/fvp/platform.h
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[../plat/fvp/aarch64/plat_common.c]: ../plat/fvp/aarch64/plat_common.c
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[../plat/fvp/plat_pm.c]: ../plat/fvp/plat_pm.c
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[../include/runtime_svc.h]: ../include/runtime_svc.h
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[plat/common/aarch64/platform_mp_stack.S]: ../plat/common/aarch64/platform_mp_stack.S
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[plat/common/aarch64/platform_up_stack.S]: ../plat/common/aarch64/platform_up_stack.S
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[plat/fvp/platform.h]: ../plat/fvp/platform.h
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[plat/fvp/aarch64/plat_common.c]: ../plat/fvp/aarch64/plat_common.c
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[plat/fvp/plat_pm.c]: ../plat/fvp/plat_pm.c
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[include/runtime_svc.h]: ../include/runtime_svc.h
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@ -91,3 +91,43 @@
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.type \_name, %function
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\_name:
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.endm
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/*
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* This macro declares an array of 1 or more stacks, properly
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* aligned and in the requested section
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*/
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#define STACK_ALIGN 6
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.macro declare_stack _name, _section, _size, _count
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.if ((\_size & ((1 << STACK_ALIGN) - 1)) <> 0)
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.error "Stack size not correctly aligned"
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.endif
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.section \_section, "aw", %nobits
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.align STACK_ALIGN
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\_name:
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.space ((\_count) * (\_size)), 0
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.endm
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/*
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* This macro calculates the base address of an MP stack using the
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* platform_get_core_pos() index, the name of the stack storage and
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* the size of each stack
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* In: X0 = MPIDR of CPU whose stack is wanted
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* Out: X0 = physical address of stack base
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* Clobber: X30, X1, X2
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*/
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.macro get_mp_stack _name, _size
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bl platform_get_core_pos
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ldr x2, =(\_name + \_size)
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mov x1, #\_size
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madd x0, x0, x1, x2
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.endm
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/*
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* This macro calculates the base address of a UP stack using the
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* name of the stack storage and the size of the stack
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* Out: X0 = physical address of stack base
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*/
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.macro get_up_stack _name, _size
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ldr x0, =(\_name + \_size)
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.endm
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@ -33,45 +33,11 @@
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#include <asm_macros.S>
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.globl pcpu_dv_mem_stack
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.weak platform_get_core_pos
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.weak platform_set_stack
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.weak platform_get_stack
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.weak platform_is_primary_cpu
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.weak platform_set_coherent_stack
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.weak platform_check_mpidr
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.weak plat_report_exception
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/* -----------------------------------------------------
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* Coherent stack sizes for debug and release builds
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* -----------------------------------------------------
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*/
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#if DEBUG
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#define PCPU_DV_MEM_STACK_SIZE 0x400
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#else
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#define PCPU_DV_MEM_STACK_SIZE 0x300
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#endif
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/* -----------------------------------------------------
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* unsigned long long platform_set_coherent_stack
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* (unsigned mpidr);
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* For a given mpidr, this function returns the stack
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* pointer allocated in device memory. This stack can
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* be used by C code which enables/disables the SCTLR.M
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* SCTLR.C bit e.g. while powering down a cpu
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* -----------------------------------------------------
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*/
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func platform_set_coherent_stack
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mov x5, x30 // lr
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bl platform_get_core_pos
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add x0, x0, #1
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mov x1, #PCPU_DV_MEM_STACK_SIZE
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mul x0, x0, x1
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ldr x1, =pcpu_dv_mem_stack
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add sp, x1, x0
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ret x5
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/* -----------------------------------------------------
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* int platform_get_core_pos(int mpidr);
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* With this function: CorePos = (ClusterId * 4) +
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@ -84,7 +50,6 @@ func platform_get_core_pos
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add x0, x1, x0, LSR #6
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ret
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/* -----------------------------------------------------
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* void platform_is_primary_cpu (unsigned int mpid);
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*
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@ -98,30 +63,6 @@ func platform_is_primary_cpu
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cset x0, eq
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ret
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/* -----------------------------------------------------
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* void platform_get_stack (unsigned long mpidr)
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* -----------------------------------------------------
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*/
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func platform_get_stack
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mov x10, x30 // lr
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bl platform_get_core_pos
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add x0, x0, #1
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mov x1, #PLATFORM_STACK_SIZE
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mul x0, x0, x1
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ldr x1, =platform_normal_stacks
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add x0, x1, x0
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ret x10
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/* -----------------------------------------------------
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* void platform_set_stack (unsigned long mpidr)
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* -----------------------------------------------------
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*/
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func platform_set_stack
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mov x9, x30 // lr
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bl platform_get_stack
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mov sp, x0
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ret x9
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/* -----------------------------------------------------
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* Placeholder function which should be redefined by
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* each platform.
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@ -138,16 +79,3 @@ func platform_check_mpidr
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*/
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func plat_report_exception
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ret
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/* -----------------------------------------------------
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* Per-cpu stacks in device memory.
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* Used for C code just before power down or right after
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* power up when the MMU or caches need to be turned on
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* or off. Each cpu gets a stack of 512 bytes.
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* -----------------------------------------------------
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*/
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.section tzfw_coherent_mem, "aw", %nobits; .align 6
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pcpu_dv_mem_stack:
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/* Zero fill */
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.space (PLATFORM_CORE_COUNT * PCPU_DV_MEM_STACK_SIZE), 0
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|
|
|
@ -0,0 +1,102 @@
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/*
|
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* Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
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*
|
||||
* Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without specific
|
||||
* prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
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|
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#include <arch.h>
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#include <platform.h>
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#include <asm_macros.S>
|
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.local pcpu_dv_mem_stack
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.local platform_normal_stacks
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.weak platform_set_stack
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.weak platform_get_stack
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.weak platform_set_coherent_stack
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/* -----------------------------------------------------
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* void platform_set_coherent_stack (unsigned long mpidr)
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*
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* For a given CPU, this function sets the stack pointer
|
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* to a stack allocated in device memory. This stack can
|
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* be used by C code which enables/disables the SCTLR.M
|
||||
* SCTLR.C bit e.g. while powering down a cpu
|
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* -----------------------------------------------------
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*/
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func platform_set_coherent_stack
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mov x5, x30 // lr
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get_mp_stack pcpu_dv_mem_stack, PCPU_DV_MEM_STACK_SIZE
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mov sp, x0
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ret x5
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/* -----------------------------------------------------
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* unsigned long platform_get_stack (unsigned long mpidr)
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*
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* For a given CPU, this function returns the stack
|
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* pointer for a stack allocated in device memory.
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* -----------------------------------------------------
|
||||
*/
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func platform_get_stack
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mov x10, x30 // lr
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get_mp_stack platform_normal_stacks, PLATFORM_STACK_SIZE
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ret x10
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/* -----------------------------------------------------
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* void platform_set_stack (unsigned long mpidr)
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*
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* For a given CPU, this function sets the stack pointer
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* to a stack allocated in normal memory.
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* -----------------------------------------------------
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*/
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func platform_set_stack
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mov x9, x30 // lr
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bl platform_get_stack
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mov sp, x0
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ret x9
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/* -----------------------------------------------------
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* Per-cpu stacks in normal memory.
|
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* Used for C code during runtime execution (when coherent
|
||||
* stacks are not required).
|
||||
* Each cpu gets a stack of PLATFORM_STACK_SIZE bytes.
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* -----------------------------------------------------
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||||
*/
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declare_stack platform_normal_stacks, tzfw_normal_stacks, \
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PLATFORM_STACK_SIZE, PLATFORM_CORE_COUNT
|
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|
||||
/* -----------------------------------------------------
|
||||
* Per-cpu stacks in device memory.
|
||||
* Used for C code just before power down or right after
|
||||
* power up when the MMU or caches need to be turned on
|
||||
* or off.
|
||||
* Each cpu gets a stack of PCPU_DV_MEM_STACK_SIZE bytes.
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
declare_stack pcpu_dv_mem_stack, tzfw_coherent_mem, \
|
||||
PCPU_DV_MEM_STACK_SIZE, PLATFORM_CORE_COUNT
|
|
@ -0,0 +1,97 @@
|
|||
/*
|
||||
* Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without specific
|
||||
* prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <arch.h>
|
||||
#include <platform.h>
|
||||
#include <asm_macros.S>
|
||||
|
||||
|
||||
.local pcpu_dv_mem_stack
|
||||
.local platform_normal_stacks
|
||||
.globl platform_set_stack
|
||||
.globl platform_get_stack
|
||||
.globl platform_set_coherent_stack
|
||||
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* void platform_set_coherent_stack (unsigned long)
|
||||
*
|
||||
* For cold-boot BL images, only the primary CPU needs a
|
||||
* stack. This function sets the stack pointer to a stack
|
||||
* allocated in device memory.
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func platform_set_coherent_stack
|
||||
get_up_stack pcpu_dv_mem_stack, PCPU_DV_MEM_STACK_SIZE
|
||||
mov sp, x0
|
||||
ret
|
||||
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* unsigned long platform_get_stack (unsigned long)
|
||||
*
|
||||
* For cold-boot BL images, only the primary CPU needs a
|
||||
* stack. This function returns the stack pointer for a
|
||||
* stack allocated in device memory.
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func platform_get_stack
|
||||
get_up_stack platform_normal_stacks, PLATFORM_STACK_SIZE
|
||||
ret
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* void platform_set_stack (unsigned long)
|
||||
*
|
||||
* For cold-boot BL images, only the primary CPU needs a
|
||||
* stack. This function sets the stack pointer to a stack
|
||||
* allocated in normal memory.
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func platform_set_stack
|
||||
get_up_stack platform_normal_stacks, PLATFORM_STACK_SIZE
|
||||
mov sp, x0
|
||||
ret
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* Single cpu stack in normal memory.
|
||||
* Used for C code during boot, PLATFORM_STACK_SIZE bytes
|
||||
* are allocated
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
declare_stack platform_normal_stacks, tzfw_normal_stacks, \
|
||||
PLATFORM_STACK_SIZE, 1
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* Single cpu stack in device/coherent memory.
|
||||
* PCPU_DV_MEM_STACK_SIZE bytes are allocated.
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
declare_stack pcpu_dv_mem_stack, tzfw_coherent_mem, \
|
||||
PCPU_DV_MEM_STACK_SIZE, 1
|
|
@ -34,10 +34,6 @@
|
|||
#include <platform.h>
|
||||
#include <xlat_tables.h>
|
||||
|
||||
unsigned char platform_normal_stacks[PLATFORM_STACK_SIZE][PLATFORM_CORE_COUNT]
|
||||
__attribute__ ((aligned(PLATFORM_CACHE_LINE_SIZE),
|
||||
section("tzfw_normal_stacks")));
|
||||
|
||||
/*******************************************************************************
|
||||
* This array holds the characteristics of the differences between the three
|
||||
* FVP platforms (Base, A53_A57 & Foundation). It will be populated during cold
|
||||
|
|
|
@ -47,7 +47,16 @@
|
|||
/*******************************************************************************
|
||||
* Generic platform constants
|
||||
******************************************************************************/
|
||||
#define PLATFORM_STACK_SIZE 0x800
|
||||
|
||||
/* Size of cacheable stacks */
|
||||
#define PLATFORM_STACK_SIZE 0x800
|
||||
|
||||
/* Size of coherent stacks for debug and release builds */
|
||||
#if DEBUG
|
||||
#define PCPU_DV_MEM_STACK_SIZE 0x400
|
||||
#else
|
||||
#define PCPU_DV_MEM_STACK_SIZE 0x300
|
||||
#endif
|
||||
|
||||
#define FIRMWARE_WELCOME_STR "Booting trusted firmware boot loader stage 1\n\r"
|
||||
|
||||
|
|
|
@ -79,14 +79,17 @@ PLAT_BL_COMMON_SOURCES := semihosting_call.S \
|
|||
BL1_SOURCES += bl1_plat_setup.c \
|
||||
bl1_plat_helpers.S \
|
||||
plat_helpers.S \
|
||||
platform_up_stack.S \
|
||||
plat_common.c \
|
||||
cci400.c
|
||||
|
||||
BL2_SOURCES += bl2_plat_setup.c \
|
||||
platform_up_stack.S \
|
||||
plat_common.c
|
||||
|
||||
BL31_SOURCES += bl31_plat_setup.c \
|
||||
plat_helpers.S \
|
||||
platform_mp_stack.S \
|
||||
plat_common.c \
|
||||
plat_pm.c \
|
||||
plat_topology.c \
|
||||
|
|
Loading…
Reference in New Issue