From 772aa5ba75f38930e8e9c3f370a4e2aa9f5f417c Mon Sep 17 00:00:00 2001 From: Konstantin Porotchkin Date: Mon, 25 Mar 2019 15:35:41 +0200 Subject: [PATCH] drivers: marvell: align and extend llc macros Make all LLC-related macros to start with the same prefix Add more LLC control registers definitions This patch is a preparation step for LLC SRAM support Change-Id: I0a4f0fc83e8ef35be93dd239a85f2a9f88d1ab19 Signed-off-by: Konstantin Porotchkin --- drivers/marvell/cache_llc.c | 6 +++--- include/drivers/marvell/cache_llc.h | 19 ++++++++++++++----- .../armada/common/aarch64/marvell_helpers.S | 2 +- 3 files changed, 18 insertions(+), 9 deletions(-) diff --git a/drivers/marvell/cache_llc.c b/drivers/marvell/cache_llc.c index 3df93a43b..9b614c496 100644 --- a/drivers/marvell/cache_llc.c +++ b/drivers/marvell/cache_llc.c @@ -31,19 +31,19 @@ void llc_cache_sync(int ap_index) void llc_flush_all(int ap_index) { - mmio_write_32(L2X0_CLEAN_INV_WAY(ap_index), LLC_WAY_MASK); + mmio_write_32(LLC_CLEAN_INV_WAY(ap_index), LLC_ALL_WAYS_MASK); llc_cache_sync(ap_index); } void llc_clean_all(int ap_index) { - mmio_write_32(L2X0_CLEAN_WAY(ap_index), LLC_WAY_MASK); + mmio_write_32(LLC_CLEAN_WAY(ap_index), LLC_ALL_WAYS_MASK); llc_cache_sync(ap_index); } void llc_inv_all(int ap_index) { - mmio_write_32(L2X0_INV_WAY(ap_index), LLC_WAY_MASK); + mmio_write_32(LLC_INV_WAY(ap_index), LLC_ALL_WAYS_MASK); llc_cache_sync(ap_index); } diff --git a/include/drivers/marvell/cache_llc.h b/include/drivers/marvell/cache_llc.h index 85babb8d4..d8eca9fbf 100644 --- a/include/drivers/marvell/cache_llc.h +++ b/include/drivers/marvell/cache_llc.h @@ -14,18 +14,27 @@ #define LLC_CTRL(ap) (MVEBU_LLC_BASE(ap) + 0x100) #define LLC_SYNC(ap) (MVEBU_LLC_BASE(ap) + 0x700) -#define L2X0_INV_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x77C) -#define L2X0_CLEAN_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x7BC) -#define L2X0_CLEAN_INV_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x7FC) +#define LLC_BANKED_MNT_AHR(ap) (MVEBU_LLC_BASE(ap) + 0x724) +#define LLC_INV_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x77C) +#define LLC_BLK_ALOC(ap) (MVEBU_LLC_BASE(ap) + 0x78c) +#define LLC_CLEAN_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x7BC) +#define LLC_CLEAN_INV_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x7FC) #define LLC_TC0_LOCK(ap) (MVEBU_LLC_BASE(ap) + 0x920) #define MASTER_LLC_CTRL LLC_CTRL(MVEBU_AP0) -#define MASTER_L2X0_INV_WAY L2X0_INV_WAY(MVEBU_AP0) +#define MASTER_LLC_INV_WAY LLC_INV_WAY(MVEBU_AP0) #define MASTER_LLC_TC0_LOCK LLC_TC0_LOCK(MVEBU_AP0) #define LLC_CTRL_EN 1 #define LLC_EXCLUSIVE_EN 0x100 -#define LLC_WAY_MASK 0xFFFFFFFF +#define LLC_ALL_WAYS_MASK 0xFFFFFFFF + +/* AP806/AP807 - 1MB 8-ways LLC */ +#define LLC_WAYS 8 +#define LLC_WAY_MASK ((1 << LLC_WAYS) - 1) +#define LLC_SIZE (1024 * 1024) +#define LLC_WAY_SIZE (LLC_SIZE / LLC_WAYS) + #ifndef __ASSEMBLER__ void llc_cache_sync(int ap_index); diff --git a/plat/marvell/armada/common/aarch64/marvell_helpers.S b/plat/marvell/armada/common/aarch64/marvell_helpers.S index 6f625b95d..4ddc73db5 100644 --- a/plat/marvell/armada/common/aarch64/marvell_helpers.S +++ b/plat/marvell/armada/common/aarch64/marvell_helpers.S @@ -185,7 +185,7 @@ func disable_sram /* Invalidate all ways */ ldr w1, =LLC_WAY_MASK - ldr x0, =MASTER_L2X0_INV_WAY + ldr x0, =MASTER_LLC_INV_WAY str w1, [x0] /* Finally disable LLC */