Merge pull request #697 from rockchip-linux/fixes-scu-idle
rockchip: fix the scu idle for rk3399
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commit
77b0532392
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@ -195,6 +195,9 @@ void rockchip_pwr_domain_suspend(const psci_power_state_t *target_state)
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if (RK_CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE)
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if (RK_CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE)
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plat_cci_disable();
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plat_cci_disable();
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if (RK_SYSTEM_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE)
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return;
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if (!rockchip_ops || !rockchip_ops->hlvl_pwr_dm_suspend)
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if (!rockchip_ops || !rockchip_ops->hlvl_pwr_dm_suspend)
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return;
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return;
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@ -263,6 +266,12 @@ void rockchip_pwr_domain_suspend_finish(const psci_power_state_t *target_state)
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if (!rockchip_ops)
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if (!rockchip_ops)
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goto comm_finish;
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goto comm_finish;
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if (RK_SYSTEM_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) {
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if (rockchip_ops->sys_pwr_dm_resume)
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rockchip_ops->sys_pwr_dm_resume();
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goto comm_finish;
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}
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if (rockchip_ops->hlvl_pwr_dm_resume) {
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if (rockchip_ops->hlvl_pwr_dm_resume) {
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for (lvl = MPIDR_AFFLVL1; lvl <= PLAT_MAX_PWR_LVL; lvl++) {
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for (lvl = MPIDR_AFFLVL1; lvl <= PLAT_MAX_PWR_LVL; lvl++) {
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lvl_state = target_state->pwr_domain_state[lvl];
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lvl_state = target_state->pwr_domain_state[lvl];
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@ -270,20 +279,16 @@ void rockchip_pwr_domain_suspend_finish(const psci_power_state_t *target_state)
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}
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}
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}
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}
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if (RK_SYSTEM_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE &&
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if (rockchip_ops->cores_pwr_dm_resume)
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rockchip_ops->sys_pwr_dm_resume) {
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rockchip_ops->sys_pwr_dm_resume();
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} else if (rockchip_ops->cores_pwr_dm_resume) {
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rockchip_ops->cores_pwr_dm_resume();
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rockchip_ops->cores_pwr_dm_resume();
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}
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comm_finish:
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/*
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/*
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* Program the gic per-cpu distributor
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* Program the gic per-cpu distributor or re-distributor interface.
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* or re-distributor interface
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* For sys power domain operation, resuming of the gic needs to operate in
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*/
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* rockchip_ops->sys_pwr_dm_resume, according to the sys power mode implements.
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*/
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plat_rockchip_gic_cpuif_enable();
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plat_rockchip_gic_cpuif_enable();
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comm_finish:
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/* Perform the common cluster specific operations */
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/* Perform the common cluster specific operations */
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if (RK_CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) {
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if (RK_CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) {
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/* Enable coherency if this cluster was off */
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/* Enable coherency if this cluster was off */
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@ -546,8 +546,7 @@ static inline void clst_pwr_domain_suspend(plat_local_state_t lvl_state)
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assert(cpu_id < PLATFORM_CORE_COUNT);
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assert(cpu_id < PLATFORM_CORE_COUNT);
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if (lvl_state == PLAT_MAX_RET_STATE ||
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if (lvl_state == PLAT_MAX_OFF_STATE) {
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lvl_state == PLAT_MAX_OFF_STATE) {
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if (cpu_id < PLATFORM_CLUSTER0_CORE_COUNT) {
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if (cpu_id < PLATFORM_CLUSTER0_CORE_COUNT) {
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pll_id = ALPLL_ID;
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pll_id = ALPLL_ID;
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clst_st_msk = CLST_L_CPUS_MSK;
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clst_st_msk = CLST_L_CPUS_MSK;
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@ -591,8 +590,7 @@ static int clst_pwr_domain_resume(plat_local_state_t lvl_state)
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assert(cpu_id < PLATFORM_CORE_COUNT);
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assert(cpu_id < PLATFORM_CORE_COUNT);
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if (lvl_state == PLAT_MAX_RET_STATE ||
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if (lvl_state == PLAT_MAX_OFF_STATE) {
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lvl_state == PLAT_MAX_OFF_STATE) {
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if (cpu_id < PLATFORM_CLUSTER0_CORE_COUNT)
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if (cpu_id < PLATFORM_CLUSTER0_CORE_COUNT)
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pll_id = ALPLL_ID;
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pll_id = ALPLL_ID;
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else
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else
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