Rework internal API to save non-secure entry point info
This patch replaces the internal psci_save_ns_entry() API with a psci_get_ns_ep_info() API. The new function splits the work done by the previous one such that it populates and returns an 'entry_point_info_t' structure with the information to enter the normal world upon completion of the CPU_SUSPEND or CPU_ON call. This information is used to populate the non-secure context structure separately. This allows the new internal API `psci_get_ns_ep_info` to return error and enable the code to return safely. Change-Id: Ifd87430a4a3168eac0ebac712f59c93cbad1b231
This commit is contained in:
parent
2f5aadedc4
commit
78879b9a5e
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@ -40,9 +40,7 @@
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#include "psci_private.h"
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typedef int (*afflvl_on_handler_t)(unsigned long target_cpu,
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aff_map_node_t *node,
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unsigned long ns_entrypoint,
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unsigned long context_id);
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aff_map_node_t *node);
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/*******************************************************************************
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* This function checks whether a cpu which has been requested to be turned on
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@ -66,14 +64,9 @@ static int cpu_on_validate_state(unsigned int psci_state)
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* TODO: Split this code across separate handlers for each type of setup?
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******************************************************************************/
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static int psci_afflvl0_on(unsigned long target_cpu,
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aff_map_node_t *cpu_node,
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unsigned long ns_entrypoint,
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unsigned long context_id)
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aff_map_node_t *cpu_node)
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{
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unsigned long psci_entrypoint;
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uint32_t ns_scr_el3 = read_scr_el3();
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uint32_t ns_sctlr_el1 = read_sctlr_el1();
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int rc;
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/* Sanity check to safeguard against data corruption */
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assert(cpu_node->level == MPIDR_AFFLVL0);
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@ -86,16 +79,6 @@ static int psci_afflvl0_on(unsigned long target_cpu,
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if (psci_spd_pm && psci_spd_pm->svc_on)
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psci_spd_pm->svc_on(target_cpu);
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/*
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* Arch. management: Derive the re-entry information for
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* the non-secure world from the non-secure state from
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* where this call originated.
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*/
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rc = psci_save_ns_entry(target_cpu, ns_entrypoint, context_id,
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ns_scr_el3, ns_sctlr_el1);
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if (rc != PSCI_E_SUCCESS)
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return rc;
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/* Set the secure world (EL3) re-entry point after BL1 */
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psci_entrypoint = (unsigned long) psci_aff_on_finish_entry;
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@ -119,9 +102,7 @@ static int psci_afflvl0_on(unsigned long target_cpu,
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* TODO: Split this code across separate handlers for each type of setup?
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******************************************************************************/
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static int psci_afflvl1_on(unsigned long target_cpu,
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aff_map_node_t *cluster_node,
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unsigned long ns_entrypoint,
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unsigned long context_id)
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aff_map_node_t *cluster_node)
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{
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unsigned long psci_entrypoint;
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@ -155,9 +136,7 @@ static int psci_afflvl1_on(unsigned long target_cpu,
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* TODO: Split this code across separate handlers for each type of setup?
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******************************************************************************/
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static int psci_afflvl2_on(unsigned long target_cpu,
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aff_map_node_t *system_node,
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unsigned long ns_entrypoint,
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unsigned long context_id)
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aff_map_node_t *system_node)
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{
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unsigned long psci_entrypoint;
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@ -201,9 +180,7 @@ static const afflvl_on_handler_t psci_afflvl_on_handlers[] = {
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static int psci_call_on_handlers(aff_map_node_t *target_cpu_nodes[],
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int start_afflvl,
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int end_afflvl,
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unsigned long target_cpu,
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unsigned long entrypoint,
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unsigned long context_id)
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unsigned long target_cpu)
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{
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int rc = PSCI_E_INVALID_PARAMS, level;
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aff_map_node_t *node;
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@ -219,9 +196,7 @@ static int psci_call_on_handlers(aff_map_node_t *target_cpu_nodes[],
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* affinity levels.
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*/
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rc = psci_afflvl_on_handlers[level](target_cpu,
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node,
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entrypoint,
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context_id);
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node);
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if (rc != PSCI_E_SUCCESS)
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break;
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}
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@ -246,8 +221,7 @@ static int psci_call_on_handlers(aff_map_node_t *target_cpu_nodes[],
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* first.
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******************************************************************************/
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int psci_afflvl_on(unsigned long target_cpu,
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unsigned long entrypoint,
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unsigned long context_id,
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entry_point_info_t *ep,
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int start_afflvl,
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int end_afflvl)
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{
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@ -290,20 +264,23 @@ int psci_afflvl_on(unsigned long target_cpu,
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rc = psci_call_on_handlers(target_cpu_nodes,
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start_afflvl,
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end_afflvl,
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target_cpu,
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entrypoint,
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context_id);
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target_cpu);
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/*
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* This function updates the state of each affinity instance
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* corresponding to the mpidr in the range of affinity levels
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* specified.
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*/
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if (rc == PSCI_E_SUCCESS)
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if (rc == PSCI_E_SUCCESS) {
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psci_do_afflvl_state_mgmt(start_afflvl,
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end_afflvl,
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target_cpu_nodes,
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PSCI_STATE_ON_PENDING);
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/*
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* Store the re-entry information for the non-secure world.
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*/
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cm_init_context(target_cpu, ep);
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}
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exit:
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/*
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@ -41,8 +41,6 @@
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#include "psci_private.h"
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typedef int (*afflvl_suspend_handler_t)(aff_map_node_t *node,
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unsigned long ns_entrypoint,
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unsigned long context_id,
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unsigned int power_state);
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/*******************************************************************************
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@ -106,14 +104,9 @@ int psci_get_suspend_stateid_by_mpidr(unsigned long mpidr)
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* level which is called when that affinity level is about to be suspended.
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******************************************************************************/
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static int psci_afflvl0_suspend(aff_map_node_t *cpu_node,
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unsigned long ns_entrypoint,
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unsigned long context_id,
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unsigned int power_state)
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{
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unsigned long psci_entrypoint;
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uint32_t ns_scr_el3 = read_scr_el3();
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uint32_t ns_sctlr_el1 = read_sctlr_el1();
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int rc;
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/* Sanity check to safeguard against data corruption */
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assert(cpu_node->level == MPIDR_AFFLVL0);
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@ -122,8 +115,7 @@ static int psci_afflvl0_suspend(aff_map_node_t *cpu_node,
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psci_set_suspend_power_state(power_state);
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/*
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* Generic management: Store the re-entry information for the non-secure
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* world and allow the secure world to suspend itself
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* Generic management: Allow the Secure world to suspend itself
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*/
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/*
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if (psci_spd_pm && psci_spd_pm->svc_suspend)
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psci_spd_pm->svc_suspend(power_state);
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/*
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* Generic management: Store the re-entry information for the
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* non-secure world
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*/
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rc = psci_save_ns_entry(read_mpidr_el1(), ns_entrypoint, context_id,
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ns_scr_el3, ns_sctlr_el1);
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if (rc != PSCI_E_SUCCESS)
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return rc;
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/* Set the secure world (EL3) re-entry point after BL1 */
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psci_entrypoint = (unsigned long) psci_aff_suspend_finish_entry;
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}
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static int psci_afflvl1_suspend(aff_map_node_t *cluster_node,
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unsigned long ns_entrypoint,
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unsigned long context_id,
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unsigned int power_state)
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{
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unsigned int plat_state;
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static int psci_afflvl2_suspend(aff_map_node_t *system_node,
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unsigned long ns_entrypoint,
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unsigned long context_id,
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unsigned int power_state)
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{
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unsigned int plat_state;
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static int psci_call_suspend_handlers(aff_map_node_t *mpidr_nodes[],
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int start_afflvl,
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int end_afflvl,
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unsigned long entrypoint,
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unsigned long context_id,
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unsigned int power_state)
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{
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int rc = PSCI_E_INVALID_PARAMS, level;
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* lower affinity levels.
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*/
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rc = psci_afflvl_suspend_handlers[level](node,
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entrypoint,
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context_id,
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power_state);
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if (rc != PSCI_E_SUCCESS)
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break;
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* to turn off affinity level X it is neccesary to turn off affinity level X - 1
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* first.
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******************************************************************************/
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int psci_afflvl_suspend(unsigned long entrypoint,
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unsigned long context_id,
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int psci_afflvl_suspend(entry_point_info_t *ep,
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unsigned int power_state,
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int start_afflvl,
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int end_afflvl)
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/* Stash the highest affinity level that will be turned off */
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psci_set_max_phys_off_afflvl(max_phys_off_afflvl);
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/*
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* Store the re-entry information for the non-secure world.
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*/
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cm_init_context(read_mpidr_el1(), ep);
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/* Perform generic, architecture and platform specific handling */
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rc = psci_call_suspend_handlers(mpidr_nodes,
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start_afflvl,
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end_afflvl,
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entrypoint,
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context_id,
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power_state);
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/*
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/*******************************************************************************
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* This function determines the full entrypoint information for the requested
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* PSCI entrypoint on power on/resume and saves this in the non-secure CPU
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* cpu_context, ready for when the core boots.
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* PSCI entrypoint on power on/resume and returns it.
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******************************************************************************/
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int psci_save_ns_entry(uint64_t mpidr,
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uint64_t entrypoint, uint64_t context_id,
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uint32_t ns_scr_el3, uint32_t ns_sctlr_el1)
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int psci_get_ns_ep_info(entry_point_info_t *ep,
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uint64_t entrypoint, uint64_t context_id)
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{
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uint32_t ep_attr, mode, sctlr, daif, ee;
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entry_point_info_t ep;
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uint32_t ns_scr_el3 = read_scr_el3();
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uint32_t ns_sctlr_el1 = read_sctlr_el1();
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sctlr = ns_scr_el3 & SCR_HCE_BIT ? read_sctlr_el2() : ns_sctlr_el1;
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ee = 0;
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ep_attr |= EP_EE_BIG;
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ee = 1;
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}
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SET_PARAM_HEAD(&ep, PARAM_EP, VERSION_1, ep_attr);
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SET_PARAM_HEAD(ep, PARAM_EP, VERSION_1, ep_attr);
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ep.pc = entrypoint;
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memset(&ep.args, 0, sizeof(ep.args));
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ep.args.arg0 = context_id;
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ep->pc = entrypoint;
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memset(&ep->args, 0, sizeof(ep->args));
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ep->args.arg0 = context_id;
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/*
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* Figure out whether the cpu enters the non-secure address space
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mode = ns_scr_el3 & SCR_HCE_BIT ? MODE_EL2 : MODE_EL1;
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ep.spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
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ep->spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
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} else {
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mode = ns_scr_el3 & SCR_HCE_BIT ? MODE32_hyp : MODE32_svc;
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*/
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daif = DAIF_ABT_BIT | DAIF_IRQ_BIT | DAIF_FIQ_BIT;
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ep.spsr = SPSR_MODE32(mode, entrypoint & 0x1, ee, daif);
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ep->spsr = SPSR_MODE32(mode, entrypoint & 0x1, ee, daif);
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}
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/* initialise an entrypoint to set up the CPU context */
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cm_init_context(mpidr, &ep);
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return PSCI_E_SUCCESS;
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}
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@ -45,6 +45,7 @@ int psci_cpu_on(unsigned long target_cpu,
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{
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int rc;
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unsigned int start_afflvl, end_afflvl;
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entry_point_info_t ep;
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/* Determine if the cpu exists of not */
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rc = psci_validate_mpidr(target_cpu, MPIDR_AFFLVL0);
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@ -52,6 +53,16 @@ int psci_cpu_on(unsigned long target_cpu,
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goto exit;
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}
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/*
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* Verify and derive the re-entry information for
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* the non-secure world from the non-secure state from
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* where this call originated.
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*/
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rc = psci_get_ns_ep_info(&ep, entrypoint, context_id);
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if (rc != PSCI_E_SUCCESS)
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return rc;
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/*
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* To turn this cpu on, specify which affinity
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* levels need to be turned on
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start_afflvl = MPIDR_AFFLVL0;
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end_afflvl = get_max_afflvl();
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rc = psci_afflvl_on(target_cpu,
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entrypoint,
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context_id,
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&ep,
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start_afflvl,
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end_afflvl);
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@ -79,6 +89,7 @@ int psci_cpu_suspend(unsigned int power_state,
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{
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int rc;
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unsigned int target_afflvl, pstate_type;
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entry_point_info_t ep;
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/* Check SBZ bits in power state are zero */
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if (psci_validate_power_state(power_state))
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return rc;
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}
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/*
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* Verify and derive the re-entry information for
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* the non-secure world from the non-secure state from
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* where this call originated.
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*/
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rc = psci_get_ns_ep_info(&ep, entrypoint, context_id);
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if (rc != PSCI_E_SUCCESS)
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return rc;
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/*
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* Do what is needed to enter the power down state. Upon success,
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* enter the final wfi which will power down this cpu else return
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* an error.
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*/
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rc = psci_afflvl_suspend(entrypoint,
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context_id,
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rc = psci_afflvl_suspend(&ep,
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power_state,
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MPIDR_AFFLVL0,
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target_afflvl);
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@ -33,6 +33,7 @@
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#include <arch.h>
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#include <bakery_lock.h>
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#include <bl_common.h>
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#include <psci.h>
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/*
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@ -101,9 +102,8 @@ int get_power_on_target_afflvl(void);
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void psci_afflvl_power_on_finish(int,
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int,
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afflvl_power_on_finisher_t *);
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int psci_save_ns_entry(uint64_t mpidr,
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uint64_t entrypoint, uint64_t context_id,
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uint32_t caller_scr_el3, uint32_t caller_sctlr_el1);
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int psci_get_ns_ep_info(entry_point_info_t *ep,
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uint64_t entrypoint, uint64_t context_id);
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int psci_check_afflvl_range(int start_afflvl, int end_afflvl);
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void psci_do_afflvl_state_mgmt(uint32_t start_afflvl,
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uint32_t end_afflvl,
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@ -129,21 +129,20 @@ int psci_get_aff_map_nodes(unsigned long mpidr,
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aff_map_node_t *psci_get_aff_map_node(unsigned long, int);
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/* Private exported functions from psci_affinity_on.c */
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int psci_afflvl_on(unsigned long,
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unsigned long,
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unsigned long,
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int,
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int);
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int psci_afflvl_on(unsigned long target_cpu,
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entry_point_info_t *ep,
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int start_afflvl,
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int end_afflvl);
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/* Private exported functions from psci_affinity_off.c */
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int psci_afflvl_off(int, int);
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/* Private exported functions from psci_affinity_suspend.c */
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int psci_afflvl_suspend(unsigned long,
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unsigned long,
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unsigned int,
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int,
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int);
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int psci_afflvl_suspend(entry_point_info_t *ep,
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unsigned int power_state,
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int start_afflvl,
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int end_afflvl);
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unsigned int psci_afflvl_suspend_finish(int, int);
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void psci_set_suspend_power_state(unsigned int power_state);
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Reference in New Issue