GIC-600: Fix power up sequence

Arm's GIC-600 features a Power Register (GICR_PWRR),
which needs to be programmed to enable redistributor
operation. Section 3.6.1 in the GIC-600 TRM describes
the power-up and power-down sequence in pseudo code,
which deviates from the current TF-A implementation
in drivers/arm/gic/v3/gic600.c.
For powering on a redistributor, the pseudo code suggests
to loop over the whole sequence (check for transition,
write request bit) instead of just looping over the
ready bit read as TF-A does in gic600_pwr_on().
This patch fixes GIC-600 power up sequence according
to the TRM.

Change-Id: I445c480e96ba356b69a2d8e5308ffe6c0a97f45b
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
This commit is contained in:
Alexei Fedorov 2019-07-31 13:24:22 +01:00 committed by Sandrine Bailleux
parent b27280a8ee
commit 7a7fbb122e
1 changed files with 39 additions and 26 deletions

View File

@ -1,14 +1,14 @@
/*
* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/*
* Driver for GIC600-specific features. This driver only overrides APIs that are
* different to those generic ones in GICv3 driver.
* Driver for GIC-600 specific features. This driver only overrides
* APIs that are different to those generic ones in GICv3 driver.
*
* GIC600 supports independently power-gating redistributor interface.
* GIC-600 supports independently power-gating redistributor interface.
*/
#include <assert.h>
@ -18,22 +18,28 @@
#include "gicv3_private.h"
/* GIC600-specific register offsets */
/* GIC-600 specific register offsets */
#define GICR_PWRR 0x24
/* GICR_PWRR fields */
#define PWRR_RDPD_SHIFT 0
#define PWRR_RDAG_SHIFT 1
#define PWRR_RDGPD_SHIFT 2
#define PWRR_RDGPO_SHIFT 3
#define PWRR_RDPD (1 << PWRR_RDPD_SHIFT)
#define PWRR_RDAG (1 << PWRR_RDAG_SHIFT)
#define PWRR_RDGPD (1 << PWRR_RDGPD_SHIFT)
#define PWRR_RDGPO (1 << PWRR_RDGPO_SHIFT)
/* Values to write to GICR_PWRR register to power redistributor */
/*
* Values to write to GICR_PWRR register to power redistributor
* for operating through the core (GICR_PWRR.RDAG = 0)
*/
#define PWRR_ON (0 << PWRR_RDPD_SHIFT)
#define PWRR_OFF (1 << PWRR_RDPD_SHIFT)
/* GIC600-specific accessor functions */
/* GIC-600 specific accessor functions */
static void gicr_write_pwrr(uintptr_t base, unsigned int val)
{
mmio_write_32(base + GICR_PWRR, val);
@ -44,39 +50,46 @@ static uint32_t gicr_read_pwrr(uintptr_t base)
return mmio_read_32(base + GICR_PWRR);
}
static int gicr_group_powering_down(uint32_t pwrr)
static void gicr_wait_group_not_in_transit(uintptr_t base)
{
/*
* Whether the redistributor group power down operation is in transit:
* i.e. it's intending to, but not finished yet.
*/
return ((pwrr & PWRR_RDGPD) && !(pwrr & PWRR_RDGPO));
/* Check group not transitioning: RDGPD == RDGPO */
while (((gicr_read_pwrr(base) & PWRR_RDGPD) >> PWRR_RDGPD_SHIFT) !=
((gicr_read_pwrr(base) & PWRR_RDGPO) >> PWRR_RDGPO_SHIFT))
;
}
static void gic600_pwr_on(uintptr_t base)
{
/* Power on redistributor */
gicr_write_pwrr(base, PWRR_ON);
do { /* Wait until group not transitioning */
gicr_wait_group_not_in_transit(base);
/* Wait until the power on state is reflected */
while (gicr_read_pwrr(base) & PWRR_RDGPO)
;
/* Power on redistributor */
gicr_write_pwrr(base, PWRR_ON);
/*
* Wait until the power on state is reflected.
* If RDPD == 0 then powered on.
*/
} while ((gicr_read_pwrr(base) & PWRR_RDPD) != PWRR_ON);
}
static void gic600_pwr_off(uintptr_t base)
{
/* Wait until group not transitioning */
gicr_wait_group_not_in_transit(base);
/* Power off redistributor */
gicr_write_pwrr(base, PWRR_OFF);
/*
* If this is the last man, turning this redistributor frame off will
* result in the group itself being powered off. In that case, wait as
* long as it's in transition, or has aborted the transition altogether
* for any reason.
* result in the group itself being powered off and RDGPD = 1.
* In that case, wait as long as it's in transition, or has aborted
* the transition altogether for any reason.
*/
if (gicr_read_pwrr(base) & PWRR_RDGPD) {
while (gicr_group_powering_down(gicr_read_pwrr(base)))
;
if ((gicr_read_pwrr(base) & PWRR_RDGPD) != 0) {
/* Wait until group not transitioning */
gicr_wait_group_not_in_transit(base);
}
}
@ -91,7 +104,7 @@ void gicv3_distif_post_restore(unsigned int proc_num)
}
/*
* Power off GIC600 redistributor
* Power off GIC-600 redistributor
*/
void gicv3_rdistif_off(unsigned int proc_num)
{
@ -109,7 +122,7 @@ void gicv3_rdistif_off(unsigned int proc_num)
}
/*
* Power on GIC600 redistributor
* Power on GIC-600 redistributor
*/
void gicv3_rdistif_on(unsigned int proc_num)
{