andrius
/
arm-trusted-firmware
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

feat(intel): support ECDSA HASH Verification 

Supporting the command to send digital signature verification
request on a data blob. This include ECC algorithm such as
NISP P-256, NISP P-384, Brainpool 256 and, Branpool 384

Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ic86f531bfe7cc7606699f2b064ac677aaf806a76
This commit is contained in:
Sieu Mun Tang 2022-05-10 17:53:32 +08:00
parent 692541051b
commit 7e25eb8701
5 changed files with 112 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
plat/intel/soc/common/include/socfpga_fcs.h
View File

@ -81,6 +81,7 @@
#define FCS_ECDSA_SHA2_DATA_SIGN_CMD_MAX_WORD_SIZE 7U
#define FCS_ECDSA_SHA2_DATA_SIG_VERIFY_CMD_MAX_WORD_SIZE 43U
#define FCS_ECDSA_HASH_SIGN_CMD_MAX_WORD_SIZE 17U
#define FCS_ECDSA_HASH_SIG_VERIFY_CMD_MAX_WORD_SIZE 52U
#define FCS_ECDH_REQUEST_CMD_MAX_WORD_SIZE 29U
/* FCS Payload Structure */
typedef struct fcs_rng_payload_t {
@ -248,6 +249,14 @@ int intel_fcs_ecdsa_hash_sign_finalize(uint32_t session_id, uint32_t context_id,
uint64_t dst_addr, uint32_t *dst_size,
uint32_t *mbox_error);
int intel_fcs_ecdsa_hash_sig_verify_init(uint32_t session_id, uint32_t context_id,
uint32_t key_id, uint32_t param_size,
uint64_t param_data, uint32_t *mbox_error);
int intel_fcs_ecdsa_hash_sig_verify_finalize(uint32_t session_id, uint32_t context_id,
uint32_t src_addr, uint32_t src_size,
uint64_t dst_addr, uint32_t *dst_size,
uint32_t *mbox_error);
int intel_fcs_ecdsa_sha2_data_sign_init(uint32_t session_id,
uint32_t context_id, uint32_t key_id,
uint32_t param_size, uint64_t param_data,

1
plat/intel/soc/common/include/socfpga_mailbox.h
View File

@ -80,6 +80,7 @@
#define MBOX_FCS_MAC_VERIFY_REQ 0x83
#define MBOX_FCS_ECDSA_HASH_SIGN_REQ 0x84
#define MBOX_FCS_ECDSA_SHA2_DATA_SIGN_REQ 0x85
#define MBOX_FCS_ECDSA_HASH_SIG_VERIFY 0x86
#define MBOX_FCS_ECDSA_SHA2_DATA_SIGN_VERIFY 0x87
#define MBOX_FCS_ECDSA_GET_PUBKEY 0x88
#define MBOX_FCS_ECDH_REQUEST 0x89

5
plat/intel/soc/common/include/socfpga_sip_svc.h
View File

@ -76,8 +76,9 @@
#define INTEL_SIP_SMC_FCS_RANDOM_NUMBER_EXT 0x4200008F
#define INTEL_SIP_SMC_FCS_CRYPTION 0x4200005B
#define INTEL_SIP_SMC_FCS_CRYPTION_EXT 0xC2000090
#define INTEL_SIP_SMC_FCS_SERVICE_REQUEST 0x4200005C
#define INTEL_SIP_SMC_FCS_SEND_CERTIFICATE 0x4200005D
#define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA 0x4200005E
#define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA 0xC200005E
#define INTEL_SIP_SMC_FCS_CNTR_SET_PREAUTH 0xC200005F
#define INTEL_SIP_SMC_FCS_PSGSIGMA_TEARDOWN 0xC2000064
#define INTEL_SIP_SMC_FCS_CHIP_ID 0xC2000065
@ -101,6 +102,8 @@
#define INTEL_SIP_SMC_FCS_ECDSA_HASH_SIGN_FINALIZE 0xC200007F
#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_INIT 0xC2000080
#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_FINALIZE 0xC2000082
#define INTEL_SIP_SMC_FCS_ECDSA_HASH_SIG_VERIFY_INIT 0xC2000083
#define INTEL_SIP_SMC_FCS_ECDSA_HASH_SIG_VERIFY_FINALIZE 0xC2000085
#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_INIT 0xC2000086
#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_FINALIZE 0xC2000088
#define INTEL_SIP_SMC_FCS_ECDSA_GET_PUBKEY_INIT 0xC2000089

85
plat/intel/soc/common/sip/socfpga_sip_fcs.c
View File

@ -16,6 +16,7 @@ static fcs_crypto_service_aes_data fcs_aes_init_payload;
static fcs_crypto_service_data fcs_sha_get_digest_param;
static fcs_crypto_service_data fcs_sha_mac_verify_param;
static fcs_crypto_service_data fcs_ecdsa_hash_sign_param;
static fcs_crypto_service_data fcs_ecdsa_hash_sig_verify_param;
static fcs_crypto_service_data fcs_sha2_data_sign_param;
static fcs_crypto_service_data fcs_sha2_data_sig_verify_param;
static fcs_crypto_service_data fcs_ecdsa_get_pubkey_param;
@ -1103,6 +1104,90 @@ int intel_fcs_ecdsa_hash_sign_finalize(uint32_t session_id, uint32_t context_id,
return INTEL_SIP_SMC_STATUS_OK;
}
int intel_fcs_ecdsa_hash_sig_verify_init(uint32_t session_id, uint32_t context_id,
uint32_t key_id, uint32_t param_size,
uint64_t param_data, uint32_t *mbox_error)
{
return intel_fcs_crypto_service_init(session_id, context_id,
key_id, param_size, param_data,
(void *) &fcs_ecdsa_hash_sig_verify_param,
mbox_error);
}
int intel_fcs_ecdsa_hash_sig_verify_finalize(uint32_t session_id, uint32_t context_id,
uint32_t src_addr, uint32_t src_size,
uint64_t dst_addr, uint32_t *dst_size,
uint32_t *mbox_error)
{
int status;
uint32_t i = 0;
uint32_t payload[FCS_ECDSA_HASH_SIG_VERIFY_CMD_MAX_WORD_SIZE] = {0U};
uint32_t resp_len = *dst_size / MBOX_WORD_BYTE;
uintptr_t hash_sig_pubkey_addr;
if ((dst_size == NULL) || (mbox_error == NULL)) {
return INTEL_SIP_SMC_STATUS_REJECTED;
}
if (fcs_ecdsa_hash_sig_verify_param.session_id != session_id ||
fcs_ecdsa_hash_sig_verify_param.context_id != context_id) {
return INTEL_SIP_SMC_STATUS_REJECTED;
}
if (!is_address_in_ddr_range(src_addr, src_size) ||
!is_address_in_ddr_range(dst_addr, *dst_size)) {
return INTEL_SIP_SMC_STATUS_REJECTED;
}
/* Prepare command payload */
/* Crypto header */
i = 0;
payload[i] = fcs_ecdsa_hash_sig_verify_param.session_id;
i++;
payload[i] = fcs_ecdsa_hash_sig_verify_param.context_id;
i++;
payload[i] = fcs_ecdsa_hash_sig_verify_param.crypto_param_size
& FCS_CS_FIELD_SIZE_MASK;
payload[i] |= (FCS_CS_FIELD_FLAG_INIT | FCS_CS_FIELD_FLAG_UPDATE
| FCS_CS_FIELD_FLAG_FINALIZE)
<< FCS_CS_FIELD_FLAG_OFFSET;
i++;
payload[i] = fcs_ecdsa_hash_sig_verify_param.key_id;
/* Crypto parameters */
i++;
payload[i] = fcs_ecdsa_hash_sig_verify_param.crypto_param
& INTEL_SIP_SMC_FCS_ECC_ALGO_MASK;
/* Hash Data Word, Signature Data Word and Public Key Data word */
i++;
hash_sig_pubkey_addr = src_addr;
memcpy((uint8_t *) &payload[i],
(uint8_t *) hash_sig_pubkey_addr, src_size);
i += (src_size / MBOX_WORD_BYTE);
status = mailbox_send_cmd(MBOX_JOB_ID, MBOX_FCS_ECDSA_HASH_SIG_VERIFY,
payload, i, CMD_CASUAL, (uint32_t *) dst_addr,
&resp_len);
memset((void *)&fcs_ecdsa_hash_sig_verify_param,
0, sizeof(fcs_crypto_service_data));
if (status < 0) {
*mbox_error = -status;
return INTEL_SIP_SMC_STATUS_ERROR;
}
*dst_size = resp_len * MBOX_WORD_BYTE;
flush_dcache_range(dst_addr, *dst_size);
return INTEL_SIP_SMC_STATUS_OK;
}
int intel_fcs_ecdsa_sha2_data_sign_init(uint32_t session_id,
uint32_t context_id, uint32_t key_id,
uint32_t param_size, uint64_t param_data,

13
plat/intel/soc/common/socfpga_sip_svc.c
View File

@ -937,6 +937,19 @@ uintptr_t sip_smc_handler(uint32_t smc_fid,
x4, x5, (uint32_t *) &x6, &mbox_error);
SMC_RET4(handle, status, mbox_error, x5, x6);
case INTEL_SIP_SMC_FCS_ECDSA_HASH_SIG_VERIFY_INIT:
x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
status = intel_fcs_ecdsa_hash_sig_verify_init(x1, x2, x3,
x4, x5, &mbox_error);
SMC_RET2(handle, status, mbox_error);
case INTEL_SIP_SMC_FCS_ECDSA_HASH_SIG_VERIFY_FINALIZE:
x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
x6 = SMC_GET_GP(handle, CTX_GPREG_X6);
status = intel_fcs_ecdsa_hash_sig_verify_finalize(x1, x2, x3,
x4, x5, (uint32_t *) &x6, &mbox_error);
SMC_RET4(handle, status, mbox_error, x5, x6);
case INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_INIT:
x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
status = intel_fcs_ecdsa_sha2_data_sig_verify_init(x1, x2, x3,