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uniphier: get back original BL31/32 location used before BL2-AT-EL3 

Commit 247fc04351 ("uniphier: switch to BL2-AT-EL3 and remove BL1
support") accidentally changed the location of BL31 and BL32.  The
new memory map overlaps with the audio DSP images, also gives impact
to OP-TEE.  They are both out of control of ARM Trusted Firmware, so
not easy to change.  This commit restores the image layout that was
originally used prior to the BL2-AT-EL3 migration.

Reported-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Masahiro Yamada 2018-01-30 18:49:37 +09:00
parent 693e278e30
commit 7e51ca8daf
2 changed files with 18 additions and 11 deletions
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20
plat/socionext/uniphier/include/platform_def.h
View File

@ -27,26 +27,28 @@
#define PLAT_MAX_OFF_STATE 2
#define PLAT_MAX_RET_STATE 1
#define UNIPHIER_SEC_DRAM_BASE 0x80000000
#define BL2_BASE 0x80000000
#define BL2_LIMIT 0x80080000
/* 0x80080000-0x81000000: reserved for DSP */
#define UNIPHIER_SEC_DRAM_BASE 0x81000000
#define UNIPHIER_SEC_DRAM_LIMIT 0x82000000
#define UNIPHIER_SEC_DRAM_SIZE ((UNIPHIER_SEC_DRAM_LIMIT) - \
(UNIPHIER_SEC_DRAM_BASE))
#define BL2_BASE (UNIPHIER_SEC_DRAM_BASE)
#define BL2_LIMIT ((BL2_BASE) + 0x00020000)
#define BL31_BASE 0x81000000
#define BL31_LIMIT 0x81080000
#define BL31_BASE (BL2_LIMIT)
#define BL31_LIMIT ((BL31_BASE) + 0x00080000)
#define BL32_BASE (BL31_LIMIT)
#define BL32_LIMIT (UNIPHIER_SEC_DRAM_LIMIT)
#define BL32_BASE 0x81080000
#define BL32_LIMIT 0x81180000
#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32)
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32)
#define PLAT_XLAT_TABLES_DYNAMIC 1
#define MAX_XLAT_TABLES 7
#define MAX_MMAP_REGIONS 6
#define MAX_MMAP_REGIONS 7
#define MAX_IO_HANDLES 2
#define MAX_IO_DEVICES 2

9
plat/socionext/uniphier/uniphier_bl2_setup.c
View File

@ -15,6 +15,9 @@
#include "uniphier.h"
#define BL2_END (unsigned long)(&__BL2_END__)
#define BL2_SIZE ((BL2_END) - (BL2_BASE))
static int uniphier_bl2_kick_scp;
void bl2_el3_early_platform_setup(u_register_t x0, u_register_t x1,
@ -24,6 +27,9 @@ void bl2_el3_early_platform_setup(u_register_t x0, u_register_t x1,
}
static const struct mmap_region uniphier_bl2_mmap[] = {
/* for BL31, BL32 */
MAP_REGION_FLAT(UNIPHIER_SEC_DRAM_BASE, UNIPHIER_SEC_DRAM_SIZE,
MT_MEMORY | MT_RW | MT_SECURE),
/* for SCP, BL33 */
MAP_REGION_FLAT(UNIPHIER_NS_DRAM_BASE, UNIPHIER_NS_DRAM_SIZE,
MT_MEMORY | MT_RW | MT_NS),
@ -36,8 +42,7 @@ void bl2_el3_plat_arch_setup(void)
int skip_scp = 0;
int ret;
uniphier_mmap_setup(UNIPHIER_SEC_DRAM_BASE, UNIPHIER_SEC_DRAM_SIZE,
uniphier_bl2_mmap);
uniphier_mmap_setup(BL2_BASE, BL2_SIZE, uniphier_bl2_mmap);
enable_mmu_el3(0);
soc = uniphier_get_soc_id();