Merge changes from topic "aa-sbsa-watchdog" into integration
* changes: plat/arm: introduce wrapper functions to setup secure watchdog drivers/sbsa: add sbsa watchdog driver
This commit is contained in:
commit
7e8f52ed7d
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@ -0,0 +1,42 @@
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/*
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* Copyright (c) 2019, ARM Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <plat/common/platform.h>
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#include <drivers/arm/sbsa.h>
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#include <lib/mmio.h>
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#include <stdint_.h>
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#include <assert.h>
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void sbsa_watchdog_offset_reg_write(uintptr_t base, uint64_t value)
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{
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assert((value >> SBSA_WDOG_WOR_WIDTH) == 0);
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mmio_write_32(base + SBSA_WDOG_WOR_LOW_OFFSET,
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((uint32_t)value & UINT32_MAX));
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mmio_write_32(base + SBSA_WDOG_WOR_HIGH_OFFSET, (uint32_t)(value >> 32));
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}
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/*
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* Start the watchdog timer at base address "base" for a
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* period of "ms" milliseconds.The watchdog has to be
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* refreshed within this time period.
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*/
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void sbsa_wdog_start(uintptr_t base, uint64_t ms)
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{
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uint64_t counter_freq;
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uint64_t offset_reg_value;
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counter_freq = (uint64_t)plat_get_syscnt_freq2();
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offset_reg_value = ms * counter_freq / 1000;
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sbsa_watchdog_offset_reg_write(base, offset_reg_value);
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mmio_write_32(base + SBSA_WDOG_WCS_OFFSET, SBSA_WDOG_WCS_EN);
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}
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/* Stop the watchdog */
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void sbsa_wdog_stop(uintptr_t base)
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{
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mmio_write_32(base + SBSA_WDOG_WCS_OFFSET, (0x0));
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}
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/*
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* Copyright (c) 2019, ARM Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef SBSA_H
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#define SBSA_H
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#include <stdint.h>
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/* Register Offsets */
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#define SBSA_WDOG_WCS_OFFSET UL(0x000)
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#define SBSA_WDOG_WOR_LOW_OFFSET UL(0x008)
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#define SBSA_WDOG_WOR_HIGH_OFFSET UL(0x00C)
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#define SBSA_WDOG_WCS_EN U(0x1)
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#define SBSA_WDOG_WOR_WIDTH UL(48)
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void sbsa_wdog_start(uintptr_t base, uint64_t ms);
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void sbsa_wdog_stop(uintptr_t base);
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#endif /* SBSA_H */
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@ -295,4 +295,8 @@ extern plat_psci_ops_t plat_arm_psci_pm_ops;
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extern const mmap_region_t plat_arm_mmap[];
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extern const unsigned int arm_pm_idle_states[];
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/* secure watchdog */
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void plat_arm_secure_wdt_start(void);
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void plat_arm_secure_wdt_stop(void);
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#endif /* PLAT_ARM_H */
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@ -5,9 +5,10 @@
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*/
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#include <common/tbbr/tbbr_img_def.h>
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#include <drivers/arm/sp805.h>
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#include <plat/arm/common/plat_arm.h>
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#include <plat/arm/common/arm_def.h>
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#include <plat/common/platform.h>
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#include "fvp_private.h"
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/*******************************************************************************
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@ -30,3 +31,13 @@ void bl1_early_platform_setup(void)
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*/
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fvp_interconnect_enable();
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}
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void plat_arm_secure_wdt_start(void)
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{
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sp805_start(ARM_SP805_TWDG_BASE, ARM_TWDG_LOAD_VAL);
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}
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void plat_arm_secure_wdt_stop(void)
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{
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sp805_stop(ARM_SP805_TWDG_BASE);
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}
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@ -112,7 +112,8 @@ else
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FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S
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endif
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BL1_SOURCES += drivers/io/io_semihosting.c \
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BL1_SOURCES += drivers/arm/sp805/sp805.c \
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drivers/io/io_semihosting.c \
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lib/semihosting/semihosting.c \
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lib/semihosting/${ARCH}/semihosting_call.S \
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plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
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@ -4,8 +4,10 @@
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <drivers/arm/sp805.h>
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#include <plat/arm/common/plat_arm.h>
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#include <plat/common/platform.h>
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#include <platform_def.h>
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/*******************************************************************************
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* Perform any BL1 specific platform actions.
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@ -14,3 +16,13 @@ void bl1_early_platform_setup(void)
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{
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arm_bl1_early_platform_setup();
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}
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void plat_arm_secure_wdt_start(void)
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{
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sp805_start(ARM_SP805_TWDG_BASE, ARM_TWDG_LOAD_VAL);
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}
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void plat_arm_secure_wdt_stop(void)
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{
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sp805_stop(ARM_SP805_TWDG_BASE);
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}
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@ -12,6 +12,7 @@
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#include <drivers/arm/css/sds.h>
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#include <drivers/arm/sp805.h>
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#include <plat/arm/common/plat_arm.h>
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#include <plat/arm/common/arm_def.h>
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#include <plat/common/platform.h>
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#include <platform_def.h>
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@ -112,3 +113,13 @@ void bl1_plat_prepare_exit(entry_point_info_t *ep_info)
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juno_reset_to_aarch32_state();
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}
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#endif /* JUNO_AARCH32_EL3_RUNTIME */
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void plat_arm_secure_wdt_start(void)
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{
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sp805_start(ARM_SP805_TWDG_BASE, ARM_TWDG_LOAD_VAL);
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}
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void plat_arm_secure_wdt_stop(void)
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{
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sp805_stop(ARM_SP805_TWDG_BASE);
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}
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@ -62,6 +62,7 @@ BL1_SOURCES += lib/cpus/aarch64/cortex_a53.S \
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lib/cpus/aarch64/cortex_a72.S \
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plat/arm/board/juno/juno_err.c \
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plat/arm/board/juno/juno_bl1_setup.c \
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drivers/arm/sp805/sp805.c \
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${JUNO_INTERCONNECT_SOURCES} \
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${JUNO_SECURITY_SOURCES}
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@ -87,4 +87,8 @@
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/* Platform ID address */
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#define SSC_VERSION (SSC_REG_BASE + SSC_VERSION_OFFSET)
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/* Secure Watchdog Constants */
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#define SBSA_SECURE_WDOG_BASE UL(0x2A480000)
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#define SBSA_SECURE_WDOG_TIMEOUT UL(100)
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#endif /* PLATFORM_DEF_H */
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@ -10,6 +10,7 @@
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#include <common/debug.h>
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#include <plat/arm/common/plat_arm.h>
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#include <plat/common/platform.h>
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#include <drivers/arm/sbsa.h>
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/*
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* Table of regions to map using the MMU.
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{0}
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};
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void plat_arm_secure_wdt_start(void)
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{
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sbsa_wdog_start(SBSA_SECURE_WDOG_BASE, SBSA_SECURE_WDOG_TIMEOUT);
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}
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void plat_arm_secure_wdt_stop(void)
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{
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sbsa_wdog_stop(SBSA_SECURE_WDOG_BASE);
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}
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@ -25,6 +25,7 @@ N1SDP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
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PLAT_BL_COMMON_SOURCES := ${N1SDP_BASE}/n1sdp_plat.c \
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${N1SDP_BASE}/aarch64/n1sdp_helper.S
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BL1_SOURCES += drivers/arm/sbsa/sbsa.c
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BL31_SOURCES := ${N1SDP_CPU_SOURCES} \
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${INTERCONNECT_SOURCES} \
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@ -11,7 +11,6 @@
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#include <arch.h>
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#include <bl1/bl1.h>
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#include <common/bl_common.h>
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#include <drivers/arm/sp805.h>
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#include <lib/utils.h>
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#include <lib/xlat_tables/xlat_tables_compat.h>
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#include <plat/arm/common/plat_arm.h>
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@ -67,7 +66,7 @@ void arm_bl1_early_platform_setup(void)
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#if !ARM_DISABLE_TRUSTED_WDOG
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/* Enable watchdog */
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sp805_start(ARM_SP805_TWDG_BASE, ARM_TWDG_LOAD_VAL);
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plat_arm_secure_wdt_start();
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#endif
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/* Initialize the console to provide early debug support */
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{
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#if !ARM_DISABLE_TRUSTED_WDOG
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/* Disable watchdog before leaving BL1 */
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sp805_stop(ARM_SP805_TWDG_BASE);
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plat_arm_secure_wdt_stop();
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#endif
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#ifdef EL3_PAYLOAD_BASE
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@ -158,8 +158,7 @@ include lib/xlat_tables_v2/xlat_tables.mk
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PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
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endif
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BL1_SOURCES += drivers/arm/sp805/sp805.c \
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drivers/io/io_fip.c \
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BL1_SOURCES += drivers/io/io_fip.c \
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drivers/io/io_memmap.c \
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drivers/io/io_storage.c \
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plat/arm/common/arm_bl1_setup.c \
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@ -208,5 +208,8 @@
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#define PLAT_ARM_MEM_PROT_ADDR (V2M_FLASH0_BASE + \
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V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
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/*Secure Watchdog Constants */
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#define SBSA_SECURE_WDOG_BASE UL(0x2A480000)
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#define SBSA_SECURE_WDOG_TIMEOUT UL(100)
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#endif /* SGI_BASE_PLATFORM_DEF_H */
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@ -33,7 +33,8 @@ ENT_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
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PLAT_BL_COMMON_SOURCES += ${CSS_ENT_BASE}/sgi_plat.c \
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${CSS_ENT_BASE}/aarch64/sgi_helper.S
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BL1_SOURCES += ${INTERCONNECT_SOURCES}
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BL1_SOURCES += ${INTERCONNECT_SOURCES} \
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drivers/arm/sbsa/sbsa.c
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BL2_SOURCES += ${CSS_ENT_BASE}/sgi_image_load.c
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@ -13,6 +13,8 @@
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#include <drivers/arm/ccn.h>
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#include <plat/arm/common/plat_arm.h>
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#include <plat/common/platform.h>
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#include <drivers/arm/sbsa.h>
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#include <sgi_base_platform_def.h>
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#include <services/secure_partition.h>
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#define SGI_MAP_FLASH0_RO MAP_REGION_FLAT(V2M_FLASH0_BASE,\
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return arm_get_mbedtls_heap(heap_addr, heap_size);
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}
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#endif
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void plat_arm_secure_wdt_start(void)
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{
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sbsa_wdog_start(SBSA_SECURE_WDOG_BASE, SBSA_SECURE_WDOG_TIMEOUT);
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}
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void plat_arm_secure_wdt_stop(void)
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{
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sbsa_wdog_stop(SBSA_SECURE_WDOG_BASE);
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}
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@ -31,7 +31,8 @@ SGM_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
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BL1_SOURCES += $(SGM_CPU_SOURCES) \
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${INTERCONNECT_SOURCES} \
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${CSS_SGM_BASE}/sgm_bl1_setup.c \
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${CSS_SGM_BASE}/sgm_plat_config.c
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${CSS_SGM_BASE}/sgm_plat_config.c \
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drivers/arm/sp805/sp805.c
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BL2_SOURCES += ${SECURITY_SOURCES} \
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${CSS_SGM_BASE}/sgm_plat_config.c
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@ -8,7 +8,8 @@
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#include <common/debug.h>
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#include <plat/arm/common/plat_arm.h>
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#include <plat/arm/soc/common/soc_css.h>
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#include <plat/arm/common/arm_def.h>
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#include <drivers/arm/sp805.h>
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#include <sgm_plat_config.h>
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void bl1_early_platform_setup(void)
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plat_arm_interconnect_enter_coherency();
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#endif
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}
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void plat_arm_secure_wdt_start(void)
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{
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sp805_start(ARM_SP805_TWDG_BASE, ARM_TWDG_LOAD_VAL);
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}
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void plat_arm_secure_wdt_stop(void)
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{
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sp805_stop(ARM_SP805_TWDG_BASE);
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}
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