From 7e954dfc2ba83262f7596dd0f17de75163e49e5e Mon Sep 17 00:00:00 2001 From: Siew Chin Lim Date: Tue, 11 May 2021 21:12:22 +0800 Subject: [PATCH] feat(intel): allow to access all register addresses if DEBUG=1 Allow to access all register addresses from SMC call if compile the code with DEBUG=1 for debugging purpose. Signed-off-by: Siew Chin Lim Signed-off-by: Jit Loon Lim Change-Id: Idd31827fb71307efbdbcceeaa05f6cb072842e10 --- plat/intel/soc/common/socfpga_sip_svc.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/plat/intel/soc/common/socfpga_sip_svc.c b/plat/intel/soc/common/socfpga_sip_svc.c index e45aaa5bd..5b08653ad 100644 --- a/plat/intel/soc/common/socfpga_sip_svc.c +++ b/plat/intel/soc/common/socfpga_sip_svc.c @@ -290,6 +290,10 @@ static uint32_t intel_fpga_config_write(uint64_t mem, uint64_t size) static int is_out_of_sec_range(uint64_t reg_addr) { +#if DEBUG + return 0; +#endif + switch (reg_addr) { case(0xF8011100): /* ECCCTRL1 */ case(0xF8011104): /* ECCCTRL2 */