andrius
/
arm-trusted-firmware
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Merge changes If3859447,I56084c42 into integration 

* changes:
  feat(plat/arm/sgi): add CPU specific handler for Neoverse N2
  feat(plat/arm/sgi): add CPU specific handler for Neoverse V1
This commit is contained in:
Madhukar Pappireddy 2021-09-29 21:10:05 +02:00 committed by TrustedFirmware Code Review
parent 5447302fee d932a5831e
commit 819dd715da
1 changed files with 18 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
plat/arm/css/sgi/aarch64/sgi_helper.S
View File

@ -9,6 +9,8 @@
#include <platform_def.h>
#include <cortex_a75.h>
#include <neoverse_n1.h>
#include <neoverse_v1.h>
#include <neoverse_n2.h>
#include <cpu_macros.S>
.globl plat_arm_calc_core_pos
@ -66,6 +68,8 @@ endfunc plat_arm_calc_core_pos
func plat_reset_handler
jump_if_cpu_midr CORTEX_A75_MIDR, A75
jump_if_cpu_midr NEOVERSE_N1_MIDR, N1
jump_if_cpu_midr NEOVERSE_V1_MIDR, V1
jump_if_cpu_midr NEOVERSE_N2_MIDR, N2
ret
/* -----------------------------------------------------
@ -85,4 +89,18 @@ N1:
msr NEOVERSE_N1_CPUPWRCTLR_EL1, x0
isb
ret
V1:
mrs x0, NEOVERSE_V1_CPUPWRCTLR_EL1
bic x0, x0, #NEOVERSE_V1_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
msr NEOVERSE_V1_CPUPWRCTLR_EL1, x0
isb
ret
N2:
mrs x0, NEOVERSE_N2_CPUPWRCTLR_EL1
bic x0, x0, #NEOVERSE_N2_CORE_PWRDN_EN_BIT
msr NEOVERSE_N2_CPUPWRCTLR_EL1, x0
isb
ret
endfunc plat_reset_handler