From 9aedca021d917c7435aa2a0405972aa9d44493a2 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sun, 13 Dec 2020 20:42:22 -0600 Subject: [PATCH 1/5] feat(bl_common): import BL_NOBITS_{BASE,END} when defined If SEPARATE_NOBITS_REGION is enabled, the platform may need to map memory specifically for that region. Import the symbols from the linker script to allow the platform to do so. Signed-off-by: Samuel Holland Change-Id: Iaec4dee94a6735b22f58f7b61f18d53e7bc6ca8d --- include/common/bl_common.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/common/bl_common.h b/include/common/bl_common.h index 77fb1f679..e33840c9d 100644 --- a/include/common/bl_common.h +++ b/include/common/bl_common.h @@ -106,6 +106,10 @@ IMPORT_SYM(uintptr_t, __RODATA_END__, BL_RO_DATA_END); IMPORT_SYM(uintptr_t, __RO_START__, BL_CODE_BASE); IMPORT_SYM(uintptr_t, __RO_END__, BL_CODE_END); #endif +#if SEPARATE_NOBITS_REGION +IMPORT_SYM(uintptr_t, __NOBITS_START__, BL_NOBITS_BASE); +IMPORT_SYM(uintptr_t, __NOBITS_END__, BL_NOBITS_END); +#endif IMPORT_SYM(uintptr_t, __RW_END__, BL_END); #if defined(IMAGE_BL1) From bc135624efdfffab220b032f7f3542541195c15c Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sun, 13 Dec 2020 21:26:36 -0600 Subject: [PATCH 2/5] refactor(plat/allwinner): rename static mmap region constant This constant specifically refers to the number of static mmap regions. Rename it to make that clear. Signed-off-by: Samuel Holland Change-Id: I475c037777ce2a10db2631ec0e7446bb73590a36 --- plat/allwinner/common/include/platform_def.h | 6 +++--- plat/allwinner/common/sunxi_common.c | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/plat/allwinner/common/include/platform_def.h b/plat/allwinner/common/include/platform_def.h index 4893368c2..fa0c0abfa 100644 --- a/plat/allwinner/common/include/platform_def.h +++ b/plat/allwinner/common/include/platform_def.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -52,7 +52,8 @@ #define CACHE_WRITEBACK_SHIFT 6 #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) -#define MAX_MMAP_REGIONS (3 + PLATFORM_MMAP_REGIONS) +#define MAX_STATIC_MMAP_REGIONS 5 +#define MAX_MMAP_REGIONS (3 + MAX_STATIC_MMAP_REGIONS) #define PLAT_CSS_SCP_COM_SHARED_MEM_BASE \ (SUNXI_SRAM_A2_BASE + SUNXI_SRAM_A2_SIZE - 0x200) @@ -72,7 +73,6 @@ #define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER_COUNT * \ PLATFORM_MAX_CPUS_PER_CLUSTER) #define PLATFORM_MAX_CPUS_PER_CLUSTER U(4) -#define PLATFORM_MMAP_REGIONS 5 #define PLATFORM_STACK_SIZE (0x1000 / PLATFORM_CORE_COUNT) #ifndef SPD_none diff --git a/plat/allwinner/common/sunxi_common.c b/plat/allwinner/common/sunxi_common.c index d47d3605b..9d1b3c1ea 100644 --- a/plat/allwinner/common/sunxi_common.c +++ b/plat/allwinner/common/sunxi_common.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -14,7 +14,7 @@ #include #include -static const mmap_region_t sunxi_mmap[PLATFORM_MMAP_REGIONS + 1] = { +static const mmap_region_t sunxi_mmap[MAX_STATIC_MMAP_REGIONS + 1] = { MAP_REGION_FLAT(SUNXI_SRAM_BASE, SUNXI_SRAM_SIZE, MT_RW_DATA | MT_SECURE), #ifdef SUNXI_SCP_BASE From ab74206b605eb6e8d573de15161bb14971556714 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sun, 13 Dec 2020 20:45:49 -0600 Subject: [PATCH 3/5] refactor(plat/allwinner): map SRAM as device memory by default The SRAM on Allwinner platforms is shared between BL31 and coprocessor firmware. Previously, SRAM was mapped as normal memory by default. This scheme requires carveouts and cache maintenance code for proper synchronization with the coprocessor. A better scheme is to only map pages owned by BL31 as normal memory, and leave everything else as device memory. This removes the need for cache maintenance, and it makes the mapping for BL31 RW data explicit instead of magic. Signed-off-by: Samuel Holland Change-Id: I820ddeba2dfa2396361c2322308c0db51b55c348 --- plat/allwinner/common/include/platform_def.h | 4 ++-- plat/allwinner/common/sunxi_common.c | 16 ++++++++++++---- plat/allwinner/common/sunxi_scpi_pm.c | 1 - plat/allwinner/sun50i_a64/sunxi_power.c | 1 - 4 files changed, 14 insertions(+), 8 deletions(-) diff --git a/plat/allwinner/common/include/platform_def.h b/plat/allwinner/common/include/platform_def.h index fa0c0abfa..e6ca6010f 100644 --- a/plat/allwinner/common/include/platform_def.h +++ b/plat/allwinner/common/include/platform_def.h @@ -52,8 +52,8 @@ #define CACHE_WRITEBACK_SHIFT 6 #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) -#define MAX_STATIC_MMAP_REGIONS 5 -#define MAX_MMAP_REGIONS (3 + MAX_STATIC_MMAP_REGIONS) +#define MAX_STATIC_MMAP_REGIONS 4 +#define MAX_MMAP_REGIONS (5 + MAX_STATIC_MMAP_REGIONS) #define PLAT_CSS_SCP_COM_SHARED_MEM_BASE \ (SUNXI_SRAM_A2_BASE + SUNXI_SRAM_A2_SIZE - 0x200) diff --git a/plat/allwinner/common/sunxi_common.c b/plat/allwinner/common/sunxi_common.c index 9d1b3c1ea..d60d767ae 100644 --- a/plat/allwinner/common/sunxi_common.c +++ b/plat/allwinner/common/sunxi_common.c @@ -16,11 +16,7 @@ static const mmap_region_t sunxi_mmap[MAX_STATIC_MMAP_REGIONS + 1] = { MAP_REGION_FLAT(SUNXI_SRAM_BASE, SUNXI_SRAM_SIZE, - MT_RW_DATA | MT_SECURE), -#ifdef SUNXI_SCP_BASE - MAP_REGION_FLAT(SUNXI_SCP_BASE, SUNXI_SCP_SIZE, MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER), -#endif MAP_REGION_FLAT(SUNXI_DEV_BASE, SUNXI_DEV_SIZE, MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER), MAP_REGION(SUNXI_DRAM_BASE, SUNXI_DRAM_VIRT_BASE, SUNXI_DRAM_SEC_SIZE, @@ -40,12 +36,24 @@ void sunxi_configure_mmu_el3(int flags) mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE, MT_CODE | MT_SECURE); + mmap_add_region(BL_CODE_END, BL_CODE_END, + BL_END - BL_CODE_END, + MT_RW_DATA | MT_SECURE); +#if SEPARATE_CODE_AND_RODATA mmap_add_region(BL_RO_DATA_BASE, BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_BASE, MT_RO_DATA | MT_SECURE); +#endif +#if SEPARATE_NOBITS_REGION + mmap_add_region(BL_NOBITS_BASE, BL_NOBITS_BASE, + BL_NOBITS_END - BL_NOBITS_BASE, + MT_RW_DATA | MT_SECURE); +#endif +#if USE_COHERENT_MEM mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE, MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER); +#endif mmap_add(sunxi_mmap); init_xlat_tables(); diff --git a/plat/allwinner/common/sunxi_scpi_pm.c b/plat/allwinner/common/sunxi_scpi_pm.c index 74763ef7e..eb37daa63 100644 --- a/plat/allwinner/common/sunxi_scpi_pm.c +++ b/plat/allwinner/common/sunxi_scpi_pm.c @@ -212,7 +212,6 @@ int sunxi_set_scpi_psci_ops(const plat_psci_ops_t **psci_ops) uint32_t offset = SUNXI_SCP_BASE - vector; mmio_write_32(vector, offset >> 2); - clean_dcache_range(vector, sizeof(uint32_t)); } /* Take the SCP out of reset. */ diff --git a/plat/allwinner/sun50i_a64/sunxi_power.c b/plat/allwinner/sun50i_a64/sunxi_power.c index 0fdb62d05..a35b9ddc0 100644 --- a/plat/allwinner/sun50i_a64/sunxi_power.c +++ b/plat/allwinner/sun50i_a64/sunxi_power.c @@ -244,7 +244,6 @@ void sunxi_cpu_power_off_self(void) * in instruction granularity (32 bits). */ mmio_write_32(arisc_reset_vec, ((uintptr_t)code - arisc_reset_vec) / 4); - clean_dcache_range(arisc_reset_vec, 4); /* De-assert the arisc reset line to let it run. */ mmio_setbits_32(SUNXI_R_CPUCFG_BASE, BIT(0)); From 8d9efdf8a8885e8520c80692c3ffc36ff2c4b363 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sun, 13 Dec 2020 20:22:42 -0600 Subject: [PATCH 4/5] refactor(plat/allwinner): do not map BL32 DRAM at EL3 BL31 does not appear to ever access the DRAM allocated to BL32, so there is no need to map it at EL3. Signed-off-by: Samuel Holland Change-Id: Ie8727b793e53ea14517894942266f6da0333eb74 --- plat/allwinner/common/include/platform_def.h | 8 +++----- plat/allwinner/common/sunxi_common.c | 2 -- 2 files changed, 3 insertions(+), 7 deletions(-) diff --git a/plat/allwinner/common/include/platform_def.h b/plat/allwinner/common/include/platform_def.h index e6ca6010f..de44174b2 100644 --- a/plat/allwinner/common/include/platform_def.h +++ b/plat/allwinner/common/include/platform_def.h @@ -39,20 +39,18 @@ #define MAX_XLAT_TABLES 1 #define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 28) -#define SUNXI_BL33_VIRT_BASE (SUNXI_DRAM_VIRT_BASE + SUNXI_DRAM_SEC_SIZE) + +#define SUNXI_BL33_VIRT_BASE SUNXI_DRAM_VIRT_BASE #endif /* SUNXI_BL31_IN_DRAM */ -/* How much memory to reserve as secure for BL32, if configured */ -#define SUNXI_DRAM_SEC_SIZE (32U << 20) - /* How much DRAM to map (to map BL33, for fetching the DTB from U-Boot) */ #define SUNXI_DRAM_MAP_SIZE (64U << 20) #define CACHE_WRITEBACK_SHIFT 6 #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) -#define MAX_STATIC_MMAP_REGIONS 4 +#define MAX_STATIC_MMAP_REGIONS 3 #define MAX_MMAP_REGIONS (5 + MAX_STATIC_MMAP_REGIONS) #define PLAT_CSS_SCP_COM_SHARED_MEM_BASE \ diff --git a/plat/allwinner/common/sunxi_common.c b/plat/allwinner/common/sunxi_common.c index d60d767ae..82410b1ed 100644 --- a/plat/allwinner/common/sunxi_common.c +++ b/plat/allwinner/common/sunxi_common.c @@ -19,8 +19,6 @@ static const mmap_region_t sunxi_mmap[MAX_STATIC_MMAP_REGIONS + 1] = { MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER), MAP_REGION_FLAT(SUNXI_DEV_BASE, SUNXI_DEV_SIZE, MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER), - MAP_REGION(SUNXI_DRAM_BASE, SUNXI_DRAM_VIRT_BASE, SUNXI_DRAM_SEC_SIZE, - MT_RW_DATA | MT_SECURE), MAP_REGION(PRELOADED_BL33_BASE, SUNXI_BL33_VIRT_BASE, SUNXI_DRAM_MAP_SIZE, MT_RW_DATA | MT_NS), {}, From 0e54a7899dcab939e5204bbe52dc29b9674cfd13 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sun, 4 Apr 2021 15:54:17 -0500 Subject: [PATCH 5/5] refactor(plat/allwinner): clean up platform definitions Group the SCP base/size definitions in a more logical location. Signed-off-by: Samuel Holland Change-Id: Id43f9b468d7d855a2413173d674a5ee666527808 --- plat/allwinner/common/include/platform_def.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/plat/allwinner/common/include/platform_def.h b/plat/allwinner/common/include/platform_def.h index de44174b2..56a2ad6f7 100644 --- a/plat/allwinner/common/include/platform_def.h +++ b/plat/allwinner/common/include/platform_def.h @@ -13,9 +13,6 @@ #include -/* The SCP firmware is allocated the last 16KiB of SRAM A2. */ -#define SUNXI_SCP_SIZE 0x4000 - #ifdef SUNXI_BL31_IN_DRAM #define BL31_BASE SUNXI_DRAM_BASE @@ -31,7 +28,6 @@ #define BL31_BASE (SUNXI_SRAM_A2_BASE + 0x4000) #define BL31_LIMIT (SUNXI_SRAM_A2_BASE + \ SUNXI_SRAM_A2_SIZE - SUNXI_SCP_SIZE) -#define SUNXI_SCP_BASE BL31_LIMIT /* Overwrite U-Boot SPL, but reserve the first page for the SPL header. */ #define BL31_NOBITS_BASE (SUNXI_SRAM_A1_BASE + 0x1000) @@ -42,6 +38,10 @@ #define SUNXI_BL33_VIRT_BASE SUNXI_DRAM_VIRT_BASE +/* The SCP firmware is allocated the last 16KiB of SRAM A2. */ +#define SUNXI_SCP_BASE BL31_LIMIT +#define SUNXI_SCP_SIZE 0x4000 + #endif /* SUNXI_BL31_IN_DRAM */ /* How much DRAM to map (to map BL33, for fetching the DTB from U-Boot) */