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Tegra186: PSCI: support for 64-bit TZDRAM base 

This patch fixes the variable width to store the TZDRAM base
address used to resume from System Suspend.

Change-Id: Ib67eda64b09f26fb2f427f0d624f057081473132
Signed-off-by: Steven Kao <skao@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
This commit is contained in:
Steven Kao 2016-12-23 15:43:17 +08:00 committed by Varun Wadekar
parent 16c7cd01b2
commit 83f3f536e5
1 changed files with 1 additions and 1 deletions
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2
plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
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@ -260,7 +260,7 @@ int tegra_soc_pwr_domain_power_down_wfi(const psci_power_state_t *target_state)
plat_params_from_bl2_t *params_from_bl2 = bl31_get_plat_params();
unsigned int stateid_afflvl2 = pwr_domain_state[PLAT_MAX_PWR_LVL] &
TEGRA186_STATE_ID_MASK;
uint32_t val;
uint64_t val;
if (stateid_afflvl2 == PSTATE_ID_SOC_POWERDN) {
/*