Merge changes from topic "versal-bug-fixes-and-new-apis" into integration
* changes: plat: xilinx: versal: Add support of register notifier plat: xilinx: versal: Add support to get clock rate value plat: xilinx: versal: Add support of set max latency for the device plat: versal: Add InitFinalize API call xilinx: versal: Updated Response of QueryData API call plat:xilinx:versal: Use defaults when PDI is without sw partitions plat: xilinx: Mask unnecessary bytes of return error code xilinx: versal: Skip store/restore of GIC during CPU idle plat: versal: Update API list in feature check xilinx: versal: Do not pass ACPU0 always in set_wakeup_source()
This commit is contained in:
commit
852e494075
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@ -18,6 +18,8 @@
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#include "pm_ipi.h"
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#define ERROR_CODE_MASK 0xFFFFU
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DEFINE_BAKERY_LOCK(pm_secure_lock);
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/**
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|
@ -230,7 +232,7 @@ enum pm_ret_status pm_ipi_send_sync(const struct pm_proc *proc,
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if (ret != PM_RET_SUCCESS)
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goto unlock;
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ret = pm_ipi_buff_read(proc, value, count);
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ret = ERROR_CODE_MASK & (pm_ipi_buff_read(proc, value, count));
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unlock:
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bakery_lock_release(&pm_secure_lock);
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|
|
|
@ -97,7 +97,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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enum fsbl_handoff ret = fsbl_atf_handover(&bl32_image_ep_info,
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&bl33_image_ep_info,
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atf_handoff_addr);
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if (ret == FSBL_HANDOFF_NO_STRUCT) {
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if (ret == FSBL_HANDOFF_NO_STRUCT || ret == FSBL_HANDOFF_INVAL_STRUCT) {
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bl31_set_default_config();
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} else if (ret != FSBL_HANDOFF_SUCCESS) {
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panic();
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|
|
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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|
@ -59,7 +59,9 @@ static void versal_pwr_domain_suspend(const psci_power_state_t *target_state)
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plat_versal_gic_cpuif_disable();
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plat_versal_gic_save();
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if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
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plat_versal_gic_save();
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}
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state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ?
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PM_STATE_SUSPEND_TO_RAM : PM_STATE_CPU_IDLE;
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@ -99,11 +101,9 @@ static void versal_pwr_domain_suspend_finish(
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/* APU was turned off, so restore GIC context */
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if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
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plat_versal_gic_resume();
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plat_versal_gic_cpuif_enable();
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} else {
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plat_versal_gic_cpuif_enable();
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plat_versal_gic_pcpu_init();
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}
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plat_versal_gic_cpuif_enable();
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}
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void versal_pwr_domain_on_finish(const psci_power_state_t *target_state)
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|
|
|
@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2019, Xilinx, Inc. All rights reserved.
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* Copyright (c) 2019-2020, Xilinx, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -14,6 +14,7 @@
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#include <plat/common/platform.h>
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#include "pm_api_sys.h"
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#include "pm_client.h"
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#include "pm_defs.h"
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/*********************************************************************
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* Target module IDs macros
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|
@ -83,6 +84,22 @@ enum pm_ret_status pm_get_api_version(unsigned int *version)
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return pm_ipi_send_sync(primary_proc, payload, version, 1);
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}
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/**
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* pm_init_finalize() - Call to notify PMC PM firmware that master has power
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* management enabled and that it has finished its
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* initialization
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*
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* @return Status returned by the PMU firmware
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*/
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enum pm_ret_status pm_init_finalize(void)
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{
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uint32_t payload[PAYLOAD_ARG_CNT];
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/* Send request to the PMU */
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PM_PACK_PAYLOAD1(payload, LIBPM_MODULE_ID, PM_INIT_FINALIZE);
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return pm_ipi_send_sync(primary_proc, payload, NULL, 0);
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}
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/**
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* pm_self_suspend() - PM call for processor to suspend itself
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* @nid Node id of the processor or subsystem
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|
@ -554,6 +571,22 @@ enum pm_ret_status pm_clock_get_parent(uint32_t clk_id, uint32_t *parent)
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return pm_ipi_send_sync(primary_proc, payload, parent, 1);
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}
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/**
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* pm_clock_get_rate() - Get the rate value for the clock
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* @clk_id Clock ID
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* @rate: Buffer to store clock rate value
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*
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* @return Returns status, either success or error+reason
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*/
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enum pm_ret_status pm_clock_get_rate(uint32_t clk_id, uint32_t *clk_rate)
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{
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uint32_t payload[PAYLOAD_ARG_CNT];
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|
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/* Send request to the PMC */
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PM_PACK_PAYLOAD2(payload, LIBPM_MODULE_ID, PM_CLOCK_GETRATE, clk_id);
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return pm_ipi_send_sync(primary_proc, payload, clk_rate, 2);
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}
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/**
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* pm_pll_set_param() - Set PLL parameter
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|
@ -689,12 +722,31 @@ enum pm_ret_status pm_system_shutdown(uint32_t type, uint32_t subtype)
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enum pm_ret_status pm_query_data(uint32_t qid, uint32_t arg1, uint32_t arg2,
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uint32_t arg3, uint32_t *data)
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{
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uint32_t ret;
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uint32_t version;
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uint32_t payload[PAYLOAD_ARG_CNT];
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uint32_t fw_api_version;
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/* Send request to the PMC */
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PM_PACK_PAYLOAD5(payload, LIBPM_MODULE_ID, PM_QUERY_DATA, qid, arg1,
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arg2, arg3);
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return pm_ipi_send_sync(primary_proc, payload, data, 4);
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ret = pm_feature_check(PM_QUERY_DATA, &version);
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if (PM_RET_SUCCESS == ret){
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fw_api_version = version & 0xFFFF ;
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if ((2U == fw_api_version) &&
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((XPM_QID_CLOCK_GET_NAME == qid) ||
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(XPM_QID_PINCTRL_GET_FUNCTION_NAME == qid))) {
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ret = pm_ipi_send_sync(primary_proc, payload, data, 8);
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ret = data[0];
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data[0] = data[1];
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data[1] = data[2];
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data[2] = data[3];
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} else {
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ret = pm_ipi_send_sync(primary_proc, payload, data, 4);
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}
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}
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return ret;
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}
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/**
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* pm_api_ioctl() - PM IOCTL API for device control and configs
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|
@ -780,7 +832,6 @@ enum pm_ret_status pm_feature_check(uint32_t api_id, unsigned int *version)
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switch (api_id) {
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case PM_GET_CALLBACK_DATA:
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case PM_GET_TRUSTZONE_VERSION:
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case PM_INIT_FINALIZE:
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*version = (PM_API_BASE_VERSION << 16);
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return PM_RET_SUCCESS;
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case PM_GET_API_VERSION:
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|
@ -798,6 +849,7 @@ enum pm_ret_status pm_feature_check(uint32_t api_id, unsigned int *version)
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case PM_SET_REQUIREMENT:
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case PM_RESET_ASSERT:
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case PM_RESET_GET_STATUS:
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case PM_GET_CHIPID:
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case PM_PINCTRL_REQUEST:
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case PM_PINCTRL_RELEASE:
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case PM_PINCTRL_GET_FUNCTION:
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|
@ -805,7 +857,11 @@ enum pm_ret_status pm_feature_check(uint32_t api_id, unsigned int *version)
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case PM_PINCTRL_CONFIG_PARAM_GET:
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case PM_PINCTRL_CONFIG_PARAM_SET:
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case PM_IOCTL:
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*version = (PM_API_BASE_VERSION << 16);
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break;
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case PM_QUERY_DATA:
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*version = (PM_API_QUERY_DATA_VERSION << 16);
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break;
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case PM_CLOCK_ENABLE:
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case PM_CLOCK_DISABLE:
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case PM_CLOCK_GETSTATE:
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|
@ -813,11 +869,15 @@ enum pm_ret_status pm_feature_check(uint32_t api_id, unsigned int *version)
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case PM_CLOCK_GETDIVIDER:
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case PM_CLOCK_SETPARENT:
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case PM_CLOCK_GETPARENT:
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case PM_CLOCK_GETRATE:
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case PM_PLL_SET_PARAMETER:
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case PM_PLL_GET_PARAMETER:
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case PM_PLL_SET_MODE:
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case PM_PLL_GET_MODE:
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case PM_FEATURE_CHECK:
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case PM_INIT_FINALIZE:
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case PM_SET_MAX_LATENCY:
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case PM_REGISTER_NOTIFIER:
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*version = (PM_API_BASE_VERSION << 16);
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break;
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case PM_LOAD_PDI:
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|
@ -883,3 +943,45 @@ enum pm_ret_status pm_get_op_characteristic(uint32_t device_id,
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device_id, type);
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return pm_ipi_send_sync(primary_proc, payload, result, 1);
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}
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/**
|
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* pm_set_max_latency() - PM call to change in the maximum wake-up latency
|
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* requirements for a specific device currently
|
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* used by that CPU.
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* @device_id Device ID
|
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* @latency Latency value
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*
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* @return Returns status, either success or error+reason
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*/
|
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enum pm_ret_status pm_set_max_latency(uint32_t device_id, uint32_t latency)
|
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{
|
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uint32_t payload[PAYLOAD_ARG_CNT];
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|
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/* Send request to the PMC */
|
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PM_PACK_PAYLOAD3(payload, LIBPM_MODULE_ID, PM_SET_MAX_LATENCY,
|
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device_id, latency);
|
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|
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return pm_ipi_send_sync(primary_proc, payload, NULL, 0);
|
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}
|
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|
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/**
|
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* pm_register_notifier() - PM call to register a subsystem to be notified
|
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* about the device event
|
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* @device_id Device ID for the Node to which the event is related
|
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* @event Event in question
|
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* @wake Wake subsystem upon capturing the event if value 1
|
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* @enable Enable the registration for value 1, disable for value 0
|
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*
|
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* @return Returns status, either success or error+reason
|
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*/
|
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enum pm_ret_status pm_register_notifier(uint32_t device_id, uint32_t event,
|
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uint32_t wake, uint32_t enable)
|
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{
|
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uint32_t payload[PAYLOAD_ARG_CNT];
|
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|
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/* Send request to the PMC */
|
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PM_PACK_PAYLOAD5(payload, LIBPM_MODULE_ID, PM_REGISTER_NOTIFIER,
|
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device_id, event, wake, enable);
|
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|
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return pm_ipi_send_sync(primary_proc, payload, NULL, 0);
|
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}
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2019, Xilinx, Inc. All rights reserved.
|
||||
* Copyright (c) 2019-2020, Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
@ -15,6 +15,7 @@
|
|||
**********************************************************/
|
||||
|
||||
enum pm_ret_status pm_get_api_version(unsigned int *version);
|
||||
enum pm_ret_status pm_init_finalize(void);
|
||||
enum pm_ret_status pm_self_suspend(uint32_t nid,
|
||||
unsigned int latency,
|
||||
unsigned int state,
|
||||
|
@ -52,6 +53,7 @@ enum pm_ret_status pm_clock_set_divider(uint32_t clk_id, uint32_t divider);
|
|||
enum pm_ret_status pm_clock_get_divider(uint32_t clk_id, uint32_t *divider);
|
||||
enum pm_ret_status pm_clock_set_parent(uint32_t clk_id, uint32_t parent);
|
||||
enum pm_ret_status pm_clock_get_parent(uint32_t clk_id, uint32_t *parent);
|
||||
enum pm_ret_status pm_clock_get_rate(uint32_t clk_id, uint32_t *clk_rate);
|
||||
enum pm_ret_status pm_pll_set_param(uint32_t clk_id, uint32_t param,
|
||||
uint32_t value);
|
||||
enum pm_ret_status pm_pll_get_param(uint32_t clk_id, uint32_t param,
|
||||
|
@ -72,4 +74,7 @@ enum pm_ret_status pm_load_pdi(uint32_t src, uint32_t address_low,
|
|||
enum pm_ret_status pm_get_op_characteristic(uint32_t device_id,
|
||||
enum pm_opchar_type type,
|
||||
uint32_t *result);
|
||||
enum pm_ret_status pm_set_max_latency(uint32_t device_id, uint32_t latency);
|
||||
enum pm_ret_status pm_register_notifier(uint32_t device_id, uint32_t event,
|
||||
uint32_t wake, uint32_t enable);
|
||||
#endif /* PM_API_SYS_H */
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2019, Xilinx, Inc. All rights reserved.
|
||||
* Copyright (c) 2019-2020, Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
@ -113,8 +113,9 @@ static enum pm_device_node_idx irq_to_pm_node_idx(unsigned int irq)
|
|||
/**
|
||||
* pm_client_set_wakeup_sources - Set all devices with enabled interrupts as
|
||||
* wake sources in the LibPM.
|
||||
* @node_id: Node id of processor
|
||||
*/
|
||||
static void pm_client_set_wakeup_sources(void)
|
||||
static void pm_client_set_wakeup_sources(uint32_t node_id)
|
||||
{
|
||||
uint32_t reg_num;
|
||||
uint32_t device_id;
|
||||
|
@ -147,7 +148,7 @@ static void pm_client_set_wakeup_sources(void)
|
|||
(!pm_wakeup_nodes_set[node_idx])) {
|
||||
/* Get device ID from node index */
|
||||
device_id = PERIPH_DEVID(node_idx);
|
||||
ret = pm_set_wakeup_source(XPM_DEVID_ACPU_0,
|
||||
ret = pm_set_wakeup_source(node_id,
|
||||
device_id, 1);
|
||||
pm_wakeup_nodes_set[node_idx] = !ret;
|
||||
}
|
||||
|
@ -167,7 +168,7 @@ void pm_client_suspend(const struct pm_proc *proc, unsigned int state)
|
|||
bakery_lock_get(&pm_client_secure_lock);
|
||||
|
||||
if (state == PM_STATE_SUSPEND_TO_RAM)
|
||||
pm_client_set_wakeup_sources();
|
||||
pm_client_set_wakeup_sources(proc->node_id);
|
||||
|
||||
/* Set powerdown request */
|
||||
mmio_write_32(FPD_APU_PWRCTL, mmio_read_32(FPD_APU_PWRCTL) |
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2019, Xilinx, Inc. All rights reserved.
|
||||
* Copyright (c) 2019-2020, Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
@ -39,10 +39,13 @@
|
|||
/* PM API Versions */
|
||||
#define PM_API_BASE_VERSION 1U
|
||||
|
||||
#define PM_API_QUERY_DATA_VERSION 2U
|
||||
|
||||
/* PM API ids */
|
||||
#define PM_GET_API_VERSION 1U
|
||||
#define PM_GET_DEVICE_STATUS 3U
|
||||
#define PM_GET_OP_CHARACTERISTIC 4U
|
||||
#define PM_REGISTER_NOTIFIER 5U
|
||||
#define PM_REQ_SUSPEND 6U
|
||||
#define PM_SELF_SUSPEND 7U
|
||||
#define PM_FORCE_POWERDOWN 8U
|
||||
|
@ -53,6 +56,7 @@
|
|||
#define PM_REQUEST_DEVICE 13U
|
||||
#define PM_RELEASE_DEVICE 14U
|
||||
#define PM_SET_REQUIREMENT 15U
|
||||
#define PM_SET_MAX_LATENCY 16U
|
||||
#define PM_RESET_ASSERT 17U
|
||||
#define PM_RESET_GET_STATUS 18U
|
||||
#define PM_INIT_FINALIZE 21U
|
||||
|
@ -163,4 +167,25 @@ enum pm_ret_status {
|
|||
PM_RET_ERROR_TIMEOUT = 2006,
|
||||
PM_RET_ERROR_NODE_USED = 2007
|
||||
};
|
||||
|
||||
/**
|
||||
* Qids
|
||||
*/
|
||||
enum pm_query_id {
|
||||
XPM_QID_INVALID,
|
||||
XPM_QID_CLOCK_GET_NAME,
|
||||
XPM_QID_CLOCK_GET_TOPOLOGY,
|
||||
XPM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS,
|
||||
XPM_QID_CLOCK_GET_MUXSOURCES,
|
||||
XPM_QID_CLOCK_GET_ATTRIBUTES,
|
||||
XPM_QID_PINCTRL_GET_NUM_PINS,
|
||||
XPM_QID_PINCTRL_GET_NUM_FUNCTIONS,
|
||||
XPM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS,
|
||||
XPM_QID_PINCTRL_GET_FUNCTION_NAME,
|
||||
XPM_QID_PINCTRL_GET_FUNCTION_GROUPS,
|
||||
XPM_QID_PINCTRL_GET_PIN_GROUPS,
|
||||
XPM_QID_CLOCK_GET_NUM_CLOCKS,
|
||||
XPM_QID_CLOCK_GET_MAX_DIVISOR,
|
||||
XPM_QID_PLD_GET_PARENT,
|
||||
};
|
||||
#endif /* PM_DEFS_H */
|
||||
|
|
|
@ -159,7 +159,8 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
|
|||
}
|
||||
|
||||
case PM_INIT_FINALIZE:
|
||||
SMC_RET1(handle, (uint64_t)PM_RET_SUCCESS);
|
||||
ret = pm_init_finalize();
|
||||
SMC_RET1(handle, (uint64_t)ret);
|
||||
|
||||
case PM_GET_CALLBACK_DATA:
|
||||
{
|
||||
|
@ -214,14 +215,15 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
|
|||
|
||||
case PM_QUERY_DATA:
|
||||
{
|
||||
uint32_t data[4] = { 0 };
|
||||
uint32_t data[8] = { 0 };
|
||||
|
||||
ret = pm_query_data(pm_arg[0], pm_arg[1], pm_arg[2],
|
||||
pm_arg[3], data);
|
||||
SMC_RET2(handle, (uint64_t)ret | ((uint64_t)data[0] << 32),
|
||||
(uint64_t)data[1] | ((uint64_t)data[2] << 32));
|
||||
}
|
||||
pm_arg[3], data);
|
||||
|
||||
SMC_RET2(handle, (uint64_t)ret | ((uint64_t)data[0] << 32),
|
||||
(uint64_t)data[1] | ((uint64_t)data[2] << 32));
|
||||
|
||||
}
|
||||
case PM_CLOCK_ENABLE:
|
||||
ret = pm_clock_enable(pm_arg[0]);
|
||||
SMC_RET1(handle, (uint64_t)ret);
|
||||
|
@ -262,6 +264,15 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
|
|||
SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32);
|
||||
}
|
||||
|
||||
case PM_CLOCK_GETRATE:
|
||||
{
|
||||
uint32_t rate[2] = { 0 };
|
||||
|
||||
ret = pm_clock_get_rate(pm_arg[0], rate);
|
||||
SMC_RET2(handle, (uint64_t)ret | ((uint64_t)rate[0] << 32),
|
||||
rate[1]);
|
||||
}
|
||||
|
||||
case PM_PLL_SET_PARAMETER:
|
||||
ret = pm_pll_set_param(pm_arg[0], pm_arg[1], pm_arg[2]);
|
||||
SMC_RET1(handle, (uint64_t)ret);
|
||||
|
@ -321,6 +332,18 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
|
|||
SMC_RET1(handle, (uint64_t)ret | ((uint64_t)result << 32));
|
||||
}
|
||||
|
||||
case PM_SET_MAX_LATENCY:
|
||||
{
|
||||
ret = pm_set_max_latency(pm_arg[0], pm_arg[1]);
|
||||
SMC_RET1(handle, (uint64_t)ret);
|
||||
}
|
||||
|
||||
case PM_REGISTER_NOTIFIER:
|
||||
{
|
||||
ret = pm_register_notifier(pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3]);
|
||||
SMC_RET1(handle, (uint64_t)ret);
|
||||
}
|
||||
|
||||
default:
|
||||
WARN("Unimplemented PM Service Call: 0x%x\n", smc_fid);
|
||||
SMC_RET1(handle, SMC_UNK);
|
||||
|
|
Loading…
Reference in New Issue