Update model support in User Guide
The CI has been updated to run tests against the AEMv8-A RevC model, FVP_Base_RevC-2xAEMv8A, which is available from the Fast Model releases on Connected Community [1]. Additionally, the CI now also includes the Cortex-A55x4, Cortex-A75x4 and Cortex-A55x4-A75x4 Base models. [1] https://developer.arm.com/products/system-design/fixed-virtual-platforms Change-Id: I57806f3b2a8121211490a7aa0089dcae566d8635 Signed-off-by: David Cunado <david.cunado@arm.com>
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@ -1489,13 +1489,14 @@ to load the ELF file over JTAG on Juno.
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Running the software on FVP
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---------------------------
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The latest version of the AArch64 build of TF-A has been tested on the
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following Arm FVPs (64-bit host machine only).
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The latest version of the AArch64 build of TF-A has been tested on the following
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Arm FVPs without shifted affinities, and that do not support threaded CPU cores
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(64-bit host machine only).
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NOTE: Unless otherwise stated, the model version is Version 11.2 Build 11.2.33.
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- ``Foundation_Platform``
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- ``FVP_Base_AEMv8A-AEMv8A`` (Version 9.0, Build 0.8.9005)
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- ``FVP_Base_AEMv8A-AEMv8A`` (and also Version 9.0, Build 0.8.9005)
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- ``FVP_Base_Cortex-A35x4``
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- ``FVP_Base_Cortex-A53x4``
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- ``FVP_Base_Cortex-A57x4-A53x4``
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@ -1505,12 +1506,25 @@ NOTE: Unless otherwise stated, the model version is Version 11.2 Build 11.2.33.
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- ``FVP_Base_Cortex-A73x4-A53x4``
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- ``FVP_Base_Cortex-A73x4``
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The latest version of the AArch32 build of TF-A has been tested on the
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following Arm FVPs (64-bit host machine only).
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Additionally, the AArch64 build was tested on the following Arm FVPs with
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shifted affinities, supporting threaded CPU cores (64-bit host machine only).
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- ``FVP_Base_AEMv8A-AEMv8A`` (Version 9.0, Build 0.8.9005)
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- ``FVP_Base_Cortex-A55x4-A75x4`` (Version 0.0, build 0.0.4395)
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- ``FVP_Base_Cortex-A55x4`` (Version 0.0, build 0.0.4395)
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- ``FVP_Base_Cortex-A75x4`` (Version 0.0, build 0.0.4395)
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- ``FVP_Base_RevC-2xAEMv8A``
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The latest version of the AArch32 build of TF-A has been tested on the following
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Arm FVPs without shifted affinities, and that do not support threaded CPU cores
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(64-bit host machine only).
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- ``FVP_Base_AEMv8A-AEMv8A``
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- ``FVP_Base_Cortex-A32x4``
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NOTE: The ``FVP_Base_RevC-2xAEMv8A`` FVP only supports shifted affinities, which
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is not compatible with legacy GIC configurations. Therefore this FVP does not
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support these legacy GIC configurations.
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NOTE: The build numbers quoted above are those reported by launching the FVP
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with the ``--version`` parameter.
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@ -1556,23 +1570,36 @@ all FDTs are available from there.
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- ``fvp-base-gicv2-psci.dtb``
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For use with both AEMv8 and Cortex-A57-A53 Base FVPs with
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Base memory map configuration.
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For use with models such as the Cortex-A57-A53 Base FVPs without shifted
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affinities and with Base memory map configuration.
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- ``fvp-base-gicv2-psci-aarch32.dtb``
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For use with AEMv8 and Cortex-A32 Base FVPs running Linux in AArch32 state
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with Base memory map configuration.
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For use with models such as the Cortex-A32 Base FVPs without shifted
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affinities and running Linux in AArch32 state with Base memory map
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configuration.
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- ``fvp-base-gicv3-psci.dtb``
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(Default) For use with both AEMv8 and Cortex-A57-A53 Base FVPs with Base
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memory map configuration and Linux GICv3 support.
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For use with models such as the Cortex-A57-A53 Base FVPs without shifted
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affinities and with Base memory map configuration and Linux GICv3 support.
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- ``fvp-base-gicv3-psci-1t.dtb``
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For use with models such as the AEMv8-RevC Base FVP with shifted affinities,
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single threaded CPUs, Base memory map configuration and Linux GICv3 support.
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- ``fvp-base-gicv3-psci-dynamiq.dtb``
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For use with models as the Cortex-A55-A75 Base FVPs with shifted affinities,
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single cluster, single threaded CPUs, Base memory map configuration and Linux
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GICv3 support.
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- ``fvp-base-gicv3-psci-aarch32.dtb``
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For use with AEMv8 and Cortex-A32 Base FVPs running Linux in AArch32 state
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with Base memory map configuration and Linux GICv3 support.
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For use with models such as the Cortex-A32 Base FVPs without shifted
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affinities and running Linux in AArch32 state with Base memory map
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configuration and Linux GICv3 support.
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- ``fvp-foundation-gicv2-psci.dtb``
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@ -1622,12 +1649,12 @@ Notes:
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Running on the AEMv8 Base FVP with reset to BL1 entrypoint
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The following ``FVP_Base_AEMv8A-AEMv8A`` parameters should be used to boot Linux
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The following ``FVP_Base_RevC-2xAEMv8A`` parameters should be used to boot Linux
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with 8 CPUs using the AArch64 build of TF-A.
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::
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<path-to>/FVP_Base_AEMv8A-AEMv8A \
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<path-to>/FVP_Base_RevC-2xAEMv8A \
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-C pctl.startup=0.0.0.0 \
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-C bp.secure_memory=1 \
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-C bp.tzc_400.diagnostics=1 \
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@ -1710,12 +1737,12 @@ boot Linux with 4 CPUs using the AArch32 build of TF-A.
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Running on the AEMv8 Base FVP with reset to BL31 entrypoint
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The following ``FVP_Base_AEMv8A-AEMv8A`` parameters should be used to boot Linux
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The following ``FVP_Base_RevC-2xAEMv8A`` parameters should be used to boot Linux
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with 8 CPUs using the AArch64 build of TF-A.
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::
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<path-to>/FVP_Base_AEMv8A-AEMv8A \
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<path-to>/FVP_Base_RevC-2xAEMv8A \
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-C pctl.startup=0.0.0.0 \
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-C bp.secure_memory=1 \
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-C bp.tzc_400.diagnostics=1 \
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