From 85bd0929433875e0b84fdc2046d9ec2cf0164903 Mon Sep 17 00:00:00 2001 From: Jiafei Pan Date: Fri, 18 Feb 2022 18:32:18 +0800 Subject: [PATCH] feat(layerscape): add new soc errata a010539 support Add new soc errata a010539 support. Signed-off-by: Jiafei Pan Change-Id: Idbd8caaac12da8ab4f39dc0019cb656bcf4f3401 --- plat/nxp/common/soc_errata/errata.c | 5 ++++ plat/nxp/common/soc_errata/errata.mk | 3 ++- plat/nxp/common/soc_errata/errata_a010539.c | 26 +++++++++++++++++++++ plat/nxp/common/soc_errata/errata_list.h | 4 ++++ 4 files changed, 37 insertions(+), 1 deletion(-) create mode 100644 plat/nxp/common/soc_errata/errata_a010539.c diff --git a/plat/nxp/common/soc_errata/errata.c b/plat/nxp/common/soc_errata/errata.c index 429c74f2e..59363e025 100644 --- a/plat/nxp/common/soc_errata/errata.c +++ b/plat/nxp/common/soc_errata/errata.c @@ -23,6 +23,11 @@ void soc_errata(void) INFO("SoC workaround for Errata A009660 was applied\n"); erratum_a009660(); #endif +#if ERRATA_SOC_A010539 + INFO("SoC workaround for Errata A010539 was applied\n"); + erratum_a010539(); +#endif + /* * The following DDR Erratas workaround are implemented in DDR driver, * but print information here. diff --git a/plat/nxp/common/soc_errata/errata.mk b/plat/nxp/common/soc_errata/errata.mk index 5eccae8c7..3deef3dd5 100644 --- a/plat/nxp/common/soc_errata/errata.mk +++ b/plat/nxp/common/soc_errata/errata.mk @@ -10,7 +10,8 @@ ERRATA := \ ERRATA_SOC_A050426 \ ERRATA_SOC_A008850 \ - ERRATA_SOC_A009660 + ERRATA_SOC_A009660 \ + ERRATA_SOC_A010539 define enable_errata $(1) ?= 0 diff --git a/plat/nxp/common/soc_errata/errata_a010539.c b/plat/nxp/common/soc_errata/errata_a010539.c new file mode 100644 index 000000000..3dcbdc820 --- /dev/null +++ b/plat/nxp/common/soc_errata/errata_a010539.c @@ -0,0 +1,26 @@ +/* + * Copyright 2022 NXP + * + * SPDX-License-Identifier: BSD-3-Clause + * + */ + +#include + +#include + +void erratum_a010539(void) +{ + if (get_boot_dev() == BOOT_DEVICE_QSPI) { + unsigned int *porsr1 = (void *)(NXP_DCFG_ADDR + + DCFG_PORSR1_OFFSET); + uint32_t val; + + val = (gur_in32(porsr1) & ~PORSR1_RCW_MASK); + mmio_write_32((uint32_t)(NXP_DCSR_DCFG_ADDR + + DCFG_DCSR_PORCR1_OFFSET), htobe32(val)); + /* Erratum need to set '1' to all bits for reserved SCFG register 0x1a8 */ + mmio_write_32((uint32_t)(NXP_SCFG_ADDR + 0x1a8), + htobe32(0xffffffff)); + } +} diff --git a/plat/nxp/common/soc_errata/errata_list.h b/plat/nxp/common/soc_errata/errata_list.h index 84325fe48..f6741e2b2 100644 --- a/plat/nxp/common/soc_errata/errata_list.h +++ b/plat/nxp/common/soc_errata/errata_list.h @@ -21,4 +21,8 @@ void erratum_a008850_post(void); void erratum_a009660(void); #endif +#ifdef ERRATA_SOC_A010539 +void erratum_a010539(void); +#endif + #endif /* ERRATA_LIST_H */