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ble: ap807: clean-up PLL configuration sequence 

Remove pll powerdown from pll configuration sequence to improve
stability. Remove redundant cases, which no longer exist.
Also get rid of irrelevant definition of CPU_2200_DDR_1200_RCLK_1200,
which is not used by 806/807.

Change-Id: If911e7dee003dfb9a42fafd7ffe34662f026fd23
Signed-off-by: Alex Leibovich <alexl@marvell.com>
This commit is contained in:
Alex Leibovich 2019-02-10 15:08:25 +02:00 committed by Marcin Wojtas
parent 57adbf37e6
commit 85d2ed1501
3 changed files with 6 additions and 26 deletions
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25
drivers/marvell/ap807_clocks_init.c
View File

@ -46,11 +46,6 @@ static void pll_set_freq(unsigned int freq_val)
int i;
for (i = 0 ; i < AP807_CLUSTER_NUM ; i++) {
mmio_write_32(AP807_CPU_PLL_CFG(i),
AP807_CPU_PLL_CFG_USE_REG_FILE);
mmio_write_32(AP807_CPU_PLL_CFG(i),
AP807_CPU_PLL_CFG_USE_REG_FILE |
AP807_CPU_PLL_CFG_BYPASS_MODE);
mmio_write_32(AP807_CPU_PLL_PARAM(i), freq_val);
mmio_write_32(AP807_CPU_PLL_CFG(i),
AP807_CPU_PLL_CFG_USE_REG_FILE);
@ -84,24 +79,16 @@ static void aro_to_pll(void)
*/
void ap807_clocks_init(unsigned int freq_option)
{
/* Switch from ARO to PLL */
aro_to_pll();
/* Modifications in frequency table:
* 0x0: 764x: change to 2000 MHz.
* 0x2: 744x change to 1800 MHz, 764x change to 2200/2400.
* 0x3: 3900/744x/764x change to 1200 MHz.
*/
switch (freq_option) {
case CPU_2000_DDR_1200_RCLK_1200:
pll_set_freq(PLL_FREQ_2000);
break;
#ifdef MVEBU_SOC_AP807
case CPU_2200_DDR_1200_RCLK_1200:
if (freq_option == CPU_2200_DDR_1200_RCLK_1200)
pll_set_freq(PLL_FREQ_2200);
break;
#endif
default:
break;
}
/* Switch from ARO to PLL */
aro_to_pll();
}

4
include/drivers/marvell/aro.h
View File

@ -27,11 +27,7 @@ enum cpu_clock_freq_mode {
CPU_2000_DDR_1200_RCLK_1200 = 0x0,
CPU_2000_DDR_1050_RCLK_1050 = 0x1,
CPU_1600_DDR_800_RCLK_800 = 0x4,
#ifdef MVEBU_SOC_AP807
CPU_2200_DDR_1200_RCLK_1200 = 0x6,
#else
CPU_1800_DDR_1200_RCLK_1200 = 0x6,
#endif
CPU_1800_DDR_1050_RCLK_1050 = 0x7,
CPU_1600_DDR_900_RCLK_900 = 0x0B,
CPU_1600_DDR_1050_RCLK_1050 = 0x0D,

3
plat/marvell/armada/a8k/common/plat_ble_setup.c
View File

@ -478,9 +478,6 @@ static void ble_plat_svc_config(void)
NOTICE("SVC: DEV ID: %s, FREQ Mode: 0x%x\n",
single_cluster == 0 ? "8040" : "8020", freq_pidi_mode);
switch (freq_pidi_mode) {
#ifndef MVEBU_SOC_AP807
case CPU_1800_DDR_1200_RCLK_1200:
#endif
case CPU_1800_DDR_1050_RCLK_1050:
if (perr[1])
goto perror;