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Merge pull request #996 from dp-arm/dp/aarch32-813419 

aarch32: Apply workaround for errata 813419 of Cortex-A57
This commit is contained in:
davidcunado-arm 2017-06-22 21:07:26 +01:00 committed by GitHub
parent dac22c6559 6f512a3dfd
commit 86ef3401f7
3 changed files with 27 additions and 4 deletions
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27
include/lib/aarch32/arch_helpers.h
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@ -100,15 +100,30 @@ static inline void write_ ## _name(const u_register_t v) \
* Macros to create inline functions for tlbi operations
*********************************************************************/
#if ERRATA_A57_813419
/*
* Define function for TLBI instruction with type specifier that
* implements the workaround for errata 813419 of Cortex-A57
*/
#define _DEFINE_TLBIOP_FUNC(_op, coproc, opc1, CRn, CRm, opc2) \
static inline void tlbi##_op(void) \
{ \
u_register_t v = 0; \
__asm__ volatile ("mcr "#coproc","#opc1",%0,"#CRn","#CRm","#opc2 : : "r" (v));\
__asm__ volatile ("dsb ish");\
__asm__ volatile ("mcr "#coproc","#opc1",%0,"#CRn","#CRm","#opc2 : : "r" (v));\
}
#define _DEFINE_BPIOP_FUNC(_op, coproc, opc1, CRn, CRm, opc2) \
static inline void bpi##_op(void) \
#define _DEFINE_TLBIOP_PARAM_FUNC(_op, coproc, opc1, CRn, CRm, opc2) \
static inline void tlbi##_op(u_register_t v) \
{ \
__asm__ volatile ("mcr "#coproc","#opc1",%0,"#CRn","#CRm","#opc2 : : "r" (v));\
__asm__ volatile ("dsb ish");\
__asm__ volatile ("mcr "#coproc","#opc1",%0,"#CRn","#CRm","#opc2 : : "r" (v));\
}
#else
#define _DEFINE_TLBIOP_FUNC(_op, coproc, opc1, CRn, CRm, opc2) \
static inline void tlbi##_op(void) \
{ \
u_register_t v = 0; \
__asm__ volatile ("mcr "#coproc","#opc1",%0,"#CRn","#CRm","#opc2 : : "r" (v));\
@ -119,6 +134,14 @@ static inline void tlbi##_op(u_register_t v) \
{ \
__asm__ volatile ("mcr "#coproc","#opc1",%0,"#CRn","#CRm","#opc2 : : "r" (v));\
}
#endif /* ERRATA_A57_813419 */
#define _DEFINE_BPIOP_FUNC(_op, coproc, opc1, CRn, CRm, opc2) \
static inline void bpi##_op(void) \
{ \
u_register_t v = 0; \
__asm__ volatile ("mcr "#coproc","#opc1",%0,"#CRn","#CRm","#opc2 : : "r" (v));\
}
/* Define function for simple TLBI operation */
#define DEFINE_TLBIOP_FUNC(_op, ...) \

2
lib/xlat_tables/aarch32/xlat_tables.c
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@ -149,7 +149,7 @@ void enable_mmu_secure(unsigned int flags)
* and translation register writes are committed
* before enabling the MMU
*/
dsb();
dsbish();
isb();
sctlr = read_sctlr();

2
lib/xlat_tables_v2/aarch32/xlat_tables_arch.c
View File

@ -141,7 +141,7 @@ void enable_mmu_internal_secure(unsigned int flags, uint64_t *base_table)
* and translation register writes are committed
* before enabling the MMU
*/
dsb();
dsbish();
isb();
sctlr = read_sctlr();