Merge pull request #104 from athoelke:at/tsp-entrypoints-v2
This commit is contained in:
commit
8957fc76aa
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@ -34,13 +34,7 @@
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.globl tsp_entrypoint
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.globl tsp_entrypoint
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.globl tsp_cpu_on_entry
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.globl tsp_vector_table
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.globl tsp_cpu_off_entry
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.globl tsp_cpu_suspend_entry
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.globl tsp_cpu_resume_entry
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.globl tsp_fast_smc_entry
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.globl tsp_std_smc_entry
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.globl tsp_fiq_entry
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@ -157,6 +151,21 @@ func tsp_entrypoint
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tsp_entrypoint_panic:
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tsp_entrypoint_panic:
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b tsp_entrypoint_panic
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b tsp_entrypoint_panic
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/* -------------------------------------------
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* Table of entrypoint vectors provided to the
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* TSPD for the various entrypoints
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* -------------------------------------------
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*/
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func tsp_vector_table
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b tsp_std_smc_entry
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b tsp_fast_smc_entry
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b tsp_cpu_on_entry
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b tsp_cpu_off_entry
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b tsp_cpu_resume_entry
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b tsp_cpu_suspend_entry
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b tsp_fiq_entry
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/*---------------------------------------------
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/*---------------------------------------------
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* This entrypoint is used by the TSPD when this
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* This entrypoint is used by the TSPD when this
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* cpu is to be turned off through a CPU_OFF
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* cpu is to be turned off through a CPU_OFF
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@ -60,22 +60,6 @@ static tsp_args_t tsp_smc_args[PLATFORM_CORE_COUNT];
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******************************************************************************/
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******************************************************************************/
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work_statistics_t tsp_stats[PLATFORM_CORE_COUNT];
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work_statistics_t tsp_stats[PLATFORM_CORE_COUNT];
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/*******************************************************************************
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* Single reference to the various entry points exported by the test secure
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* payload. A single copy should suffice for all cpus as they are not expected
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* to change.
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******************************************************************************/
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static const entry_info_t tsp_entry_info = {
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tsp_std_smc_entry,
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tsp_fast_smc_entry,
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tsp_cpu_on_entry,
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tsp_cpu_off_entry,
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tsp_cpu_resume_entry,
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tsp_cpu_suspend_entry,
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tsp_fiq_entry,
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};
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/*******************************************************************************
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/*******************************************************************************
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* The BL32 memory footprint starts with an RO sections and ends
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* The BL32 memory footprint starts with an RO sections and ends
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* with a section for coherent RAM. Use it to find the memory size
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* with a section for coherent RAM. Use it to find the memory size
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@ -118,7 +102,7 @@ static tsp_args_t *set_smc_args(uint64_t arg0,
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/*******************************************************************************
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/*******************************************************************************
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* TSP main entry point where it gets the opportunity to initialize its secure
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* TSP main entry point where it gets the opportunity to initialize its secure
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* state/applications. Once the state is initialized, it must return to the
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* state/applications. Once the state is initialized, it must return to the
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* SPD with a pointer to the 'tsp_entry_info' structure.
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* SPD with a pointer to the 'tsp_vector_table' jump table.
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******************************************************************************/
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******************************************************************************/
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uint64_t tsp_main(void)
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uint64_t tsp_main(void)
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{
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{
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@ -147,12 +131,7 @@ uint64_t tsp_main(void)
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tsp_stats[linear_id].cpu_on_count);
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tsp_stats[linear_id].cpu_on_count);
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spin_unlock(&console_lock);
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spin_unlock(&console_lock);
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/*
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return (uint64_t) &tsp_vector_table;
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* TODO: There is a massive assumption that the SPD and SP can see each
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* other's memory without issues so it is safe to pass pointers to
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* internal memory. Replace this with a shared communication buffer.
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*/
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return (uint64_t) &tsp_entry_info;
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}
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}
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/*******************************************************************************
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/*******************************************************************************
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@ -117,24 +117,17 @@
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#include <spinlock.h>
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#include <spinlock.h>
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#include <stdint.h>
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#include <stdint.h>
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typedef void (*tsp_generic_fptr_t)(uint64_t arg0,
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typedef uint32_t tsp_vector_isn_t;
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uint64_t arg1,
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uint64_t arg2,
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uint64_t arg3,
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uint64_t arg4,
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uint64_t arg5,
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uint64_t arg6,
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uint64_t arg7);
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typedef struct entry_info {
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typedef struct tsp_vectors {
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tsp_generic_fptr_t std_smc_entry;
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tsp_vector_isn_t std_smc_entry;
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tsp_generic_fptr_t fast_smc_entry;
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tsp_vector_isn_t fast_smc_entry;
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tsp_generic_fptr_t cpu_on_entry;
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tsp_vector_isn_t cpu_on_entry;
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tsp_generic_fptr_t cpu_off_entry;
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tsp_vector_isn_t cpu_off_entry;
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tsp_generic_fptr_t cpu_resume_entry;
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tsp_vector_isn_t cpu_resume_entry;
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tsp_generic_fptr_t cpu_suspend_entry;
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tsp_vector_isn_t cpu_suspend_entry;
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tsp_generic_fptr_t fiq_entry;
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tsp_vector_isn_t fiq_entry;
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} entry_info_t;
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} tsp_vectors_t;
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typedef struct work_statistics {
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typedef struct work_statistics {
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uint32_t fiq_count; /* Number of FIQs on this cpu */
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uint32_t fiq_count; /* Number of FIQs on this cpu */
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@ -166,38 +159,6 @@ CASSERT(TSP_ARGS_SIZE == sizeof(tsp_args_t), assert_sp_args_size_mismatch);
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extern void tsp_get_magic(uint64_t args[4]);
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extern void tsp_get_magic(uint64_t args[4]);
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extern void tsp_fiq_entry(uint64_t arg0,
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uint64_t arg1,
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uint64_t arg2,
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uint64_t arg3,
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uint64_t arg4,
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uint64_t arg5,
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uint64_t arg6,
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uint64_t arg7);
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extern void tsp_std_smc_entry(uint64_t arg0,
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uint64_t arg1,
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uint64_t arg2,
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uint64_t arg3,
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uint64_t arg4,
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uint64_t arg5,
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uint64_t arg6,
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uint64_t arg7);
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extern void tsp_fast_smc_entry(uint64_t arg0,
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uint64_t arg1,
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uint64_t arg2,
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uint64_t arg3,
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uint64_t arg4,
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uint64_t arg5,
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uint64_t arg6,
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uint64_t arg7);
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extern void tsp_cpu_resume_entry(uint64_t arg0,
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uint64_t arg1,
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uint64_t arg2,
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uint64_t arg3,
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uint64_t arg4,
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uint64_t arg5,
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uint64_t arg6,
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uint64_t arg7);
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extern tsp_args_t *tsp_cpu_resume_main(uint64_t arg0,
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extern tsp_args_t *tsp_cpu_resume_main(uint64_t arg0,
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uint64_t arg1,
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uint64_t arg1,
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uint64_t arg2,
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uint64_t arg2,
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@ -206,14 +167,6 @@ extern tsp_args_t *tsp_cpu_resume_main(uint64_t arg0,
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uint64_t arg5,
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uint64_t arg5,
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uint64_t arg6,
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uint64_t arg6,
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uint64_t arg7);
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uint64_t arg7);
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extern void tsp_cpu_suspend_entry(uint64_t arg0,
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uint64_t arg1,
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uint64_t arg2,
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uint64_t arg3,
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uint64_t arg4,
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uint64_t arg5,
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uint64_t arg6,
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uint64_t arg7);
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extern tsp_args_t *tsp_cpu_suspend_main(uint64_t arg0,
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extern tsp_args_t *tsp_cpu_suspend_main(uint64_t arg0,
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uint64_t arg1,
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uint64_t arg1,
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uint64_t arg2,
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uint64_t arg2,
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@ -222,23 +175,7 @@ extern tsp_args_t *tsp_cpu_suspend_main(uint64_t arg0,
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uint64_t arg5,
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uint64_t arg5,
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uint64_t arg6,
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uint64_t arg6,
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uint64_t arg7);
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uint64_t arg7);
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extern void tsp_cpu_on_entry(uint64_t arg0,
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uint64_t arg1,
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uint64_t arg2,
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uint64_t arg3,
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uint64_t arg4,
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uint64_t arg5,
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uint64_t arg6,
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uint64_t arg7);
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extern tsp_args_t *tsp_cpu_on_main(void);
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extern tsp_args_t *tsp_cpu_on_main(void);
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extern void tsp_cpu_off_entry(uint64_t arg0,
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uint64_t arg1,
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uint64_t arg2,
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uint64_t arg3,
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uint64_t arg4,
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uint64_t arg5,
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uint64_t arg6,
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uint64_t arg7);
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extern tsp_args_t *tsp_cpu_off_main(uint64_t arg0,
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extern tsp_args_t *tsp_cpu_off_main(uint64_t arg0,
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uint64_t arg1,
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uint64_t arg1,
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uint64_t arg2,
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uint64_t arg2,
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@ -261,6 +198,10 @@ extern void tsp_update_sync_fiq_stats(uint32_t type, uint64_t elr_el3);
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/* Data structure to keep track of TSP statistics */
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/* Data structure to keep track of TSP statistics */
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extern spinlock_t console_lock;
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extern spinlock_t console_lock;
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extern work_statistics_t tsp_stats[PLATFORM_CORE_COUNT];
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extern work_statistics_t tsp_stats[PLATFORM_CORE_COUNT];
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/* Vector table of jumps */
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extern tsp_vectors_t tsp_vector_table;
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#endif /* __ASSEMBLY__ */
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#endif /* __ASSEMBLY__ */
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#endif /* __BL2_H__ */
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#endif /* __BL2_H__ */
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@ -210,8 +210,8 @@ void bl31_plat_arch_setup()
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fvp_cci_setup();
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fvp_cci_setup();
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#endif
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#endif
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configure_mmu_el3(TZRAM_BASE,
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configure_mmu_el3(BL31_RO_BASE,
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TZRAM_SIZE,
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(BL31_COHERENT_RAM_LIMIT - BL31_RO_BASE),
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BL31_RO_BASE,
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BL31_RO_BASE,
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BL31_RO_LIMIT,
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BL31_RO_LIMIT,
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BL31_COHERENT_RAM_BASE,
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BL31_COHERENT_RAM_BASE,
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@ -53,10 +53,10 @@
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#include "tspd_private.h"
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#include "tspd_private.h"
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/*******************************************************************************
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/*******************************************************************************
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* Single structure to hold information about the various entry points into the
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* Address of the entrypoint vector table in the Secure Payload. It is
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* Secure Payload. It is initialised once on the primary core after a cold boot.
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* initialised once on the primary core after a cold boot.
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******************************************************************************/
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******************************************************************************/
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entry_info_t *tsp_entry_info;
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tsp_vectors_t *tsp_vectors;
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/*******************************************************************************
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/*******************************************************************************
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* Array to keep track of per-cpu Secure Payload state
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* Array to keep track of per-cpu Secure Payload state
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@ -127,7 +127,7 @@ static uint64_t tspd_sel1_interrupt_handler(uint32_t id,
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SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS));
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SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS));
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SMC_SET_EL3(&tsp_ctx->cpu_ctx,
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SMC_SET_EL3(&tsp_ctx->cpu_ctx,
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CTX_ELR_EL3,
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CTX_ELR_EL3,
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(uint64_t) tsp_entry_info->fiq_entry);
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(uint64_t) &tsp_vectors->fiq_entry);
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cm_el1_sysregs_context_restore(SECURE);
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cm_el1_sysregs_context_restore(SECURE);
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cm_set_next_eret_context(SECURE);
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cm_set_next_eret_context(SECURE);
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@ -370,8 +370,8 @@ uint64_t tspd_smc_handler(uint32_t smc_fid,
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* Stash the SP entry points information. This is done
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* Stash the SP entry points information. This is done
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* only once on the primary cpu
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* only once on the primary cpu
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*/
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*/
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assert(tsp_entry_info == NULL);
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assert(tsp_vectors == NULL);
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tsp_entry_info = (entry_info_t *) x1;
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tsp_vectors = (tsp_vectors_t *) x1;
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/*
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/*
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* SP reports completion. The SPD must have initiated
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* SP reports completion. The SPD must have initiated
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@ -465,11 +465,11 @@ uint64_t tspd_smc_handler(uint32_t smc_fid,
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*/
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*/
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if (GET_SMC_TYPE(smc_fid) == SMC_TYPE_FAST) {
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if (GET_SMC_TYPE(smc_fid) == SMC_TYPE_FAST) {
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cm_set_elr_el3(SECURE, (uint64_t)
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cm_set_elr_el3(SECURE, (uint64_t)
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tsp_entry_info->fast_smc_entry);
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&tsp_vectors->fast_smc_entry);
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} else {
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} else {
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set_std_smc_active_flag(tsp_ctx->state);
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set_std_smc_active_flag(tsp_ctx->state);
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cm_set_elr_el3(SECURE, (uint64_t)
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cm_set_elr_el3(SECURE, (uint64_t)
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tsp_entry_info->std_smc_entry);
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&tsp_vectors->std_smc_entry);
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}
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}
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cm_el1_sysregs_context_restore(SECURE);
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cm_el1_sysregs_context_restore(SECURE);
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@ -55,11 +55,11 @@ static int32_t tspd_cpu_off_handler(uint64_t cookie)
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uint32_t linear_id = platform_get_core_pos(mpidr);
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uint32_t linear_id = platform_get_core_pos(mpidr);
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tsp_context_t *tsp_ctx = &tspd_sp_context[linear_id];
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tsp_context_t *tsp_ctx = &tspd_sp_context[linear_id];
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assert(tsp_entry_info);
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assert(tsp_vectors);
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assert(get_tsp_pstate(tsp_ctx->state) == TSP_PSTATE_ON);
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assert(get_tsp_pstate(tsp_ctx->state) == TSP_PSTATE_ON);
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/* Program the entry point and enter the TSP */
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/* Program the entry point and enter the TSP */
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cm_set_elr_el3(SECURE, (uint64_t) tsp_entry_info->cpu_off_entry);
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cm_set_elr_el3(SECURE, (uint64_t) &tsp_vectors->cpu_off_entry);
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rc = tspd_synchronous_sp_entry(tsp_ctx);
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rc = tspd_synchronous_sp_entry(tsp_ctx);
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/*
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/*
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@ -89,14 +89,14 @@ static void tspd_cpu_suspend_handler(uint64_t power_state)
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uint32_t linear_id = platform_get_core_pos(mpidr);
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uint32_t linear_id = platform_get_core_pos(mpidr);
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tsp_context_t *tsp_ctx = &tspd_sp_context[linear_id];
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tsp_context_t *tsp_ctx = &tspd_sp_context[linear_id];
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assert(tsp_entry_info);
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assert(tsp_vectors);
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assert(get_tsp_pstate(tsp_ctx->state) == TSP_PSTATE_ON);
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assert(get_tsp_pstate(tsp_ctx->state) == TSP_PSTATE_ON);
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/* Program the entry point, power_state parameter and enter the TSP */
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/* Program the entry point, power_state parameter and enter the TSP */
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write_ctx_reg(get_gpregs_ctx(&tsp_ctx->cpu_ctx),
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write_ctx_reg(get_gpregs_ctx(&tsp_ctx->cpu_ctx),
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CTX_GPREG_X0,
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CTX_GPREG_X0,
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power_state);
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power_state);
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cm_set_elr_el3(SECURE, (uint64_t) tsp_entry_info->cpu_suspend_entry);
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cm_set_elr_el3(SECURE, (uint64_t) &tsp_vectors->cpu_suspend_entry);
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rc = tspd_synchronous_sp_entry(tsp_ctx);
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rc = tspd_synchronous_sp_entry(tsp_ctx);
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/*
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/*
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@ -123,11 +123,11 @@ static void tspd_cpu_on_finish_handler(uint64_t cookie)
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uint32_t linear_id = platform_get_core_pos(mpidr);
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uint32_t linear_id = platform_get_core_pos(mpidr);
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tsp_context_t *tsp_ctx = &tspd_sp_context[linear_id];
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tsp_context_t *tsp_ctx = &tspd_sp_context[linear_id];
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assert(tsp_entry_info);
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assert(tsp_vectors);
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assert(get_tsp_pstate(tsp_ctx->state) == TSP_PSTATE_OFF);
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assert(get_tsp_pstate(tsp_ctx->state) == TSP_PSTATE_OFF);
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/* Initialise this cpu's secure context */
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/* Initialise this cpu's secure context */
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tspd_init_secure_context((uint64_t) tsp_entry_info->cpu_on_entry,
|
tspd_init_secure_context((uint64_t) &tsp_vectors->cpu_on_entry,
|
||||||
TSP_AARCH64,
|
TSP_AARCH64,
|
||||||
mpidr,
|
mpidr,
|
||||||
tsp_ctx);
|
tsp_ctx);
|
||||||
|
@ -158,14 +158,14 @@ static void tspd_cpu_suspend_finish_handler(uint64_t suspend_level)
|
||||||
uint32_t linear_id = platform_get_core_pos(mpidr);
|
uint32_t linear_id = platform_get_core_pos(mpidr);
|
||||||
tsp_context_t *tsp_ctx = &tspd_sp_context[linear_id];
|
tsp_context_t *tsp_ctx = &tspd_sp_context[linear_id];
|
||||||
|
|
||||||
assert(tsp_entry_info);
|
assert(tsp_vectors);
|
||||||
assert(get_tsp_pstate(tsp_ctx->state) == TSP_PSTATE_SUSPEND);
|
assert(get_tsp_pstate(tsp_ctx->state) == TSP_PSTATE_SUSPEND);
|
||||||
|
|
||||||
/* Program the entry point, suspend_level and enter the SP */
|
/* Program the entry point, suspend_level and enter the SP */
|
||||||
write_ctx_reg(get_gpregs_ctx(&tsp_ctx->cpu_ctx),
|
write_ctx_reg(get_gpregs_ctx(&tsp_ctx->cpu_ctx),
|
||||||
CTX_GPREG_X0,
|
CTX_GPREG_X0,
|
||||||
suspend_level);
|
suspend_level);
|
||||||
cm_set_elr_el3(SECURE, (uint64_t) tsp_entry_info->cpu_resume_entry);
|
cm_set_elr_el3(SECURE, (uint64_t) &tsp_vectors->cpu_resume_entry);
|
||||||
rc = tspd_synchronous_sp_entry(tsp_ctx);
|
rc = tspd_synchronous_sp_entry(tsp_ctx);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -183,7 +183,7 @@ extern const spd_pm_ops_t tspd_pm;
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Forward declarations
|
* Forward declarations
|
||||||
******************************************************************************/
|
******************************************************************************/
|
||||||
struct entry_info;
|
struct tsp_vectors;
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function & Data prototypes
|
* Function & Data prototypes
|
||||||
|
@ -197,7 +197,7 @@ extern int32_t tspd_init_secure_context(uint64_t entrypoint,
|
||||||
uint64_t mpidr,
|
uint64_t mpidr,
|
||||||
tsp_context_t *tsp_ctx);
|
tsp_context_t *tsp_ctx);
|
||||||
extern tsp_context_t tspd_sp_context[TSPD_CORE_COUNT];
|
extern tsp_context_t tspd_sp_context[TSPD_CORE_COUNT];
|
||||||
extern struct entry_info *tsp_entry_info;
|
extern struct tsp_vectors *tsp_vectors;
|
||||||
#endif /*__ASSEMBLY__*/
|
#endif /*__ASSEMBLY__*/
|
||||||
|
|
||||||
#endif /* __TSPD_PRIVATE_H__ */
|
#endif /* __TSPD_PRIVATE_H__ */
|
||||||
|
|
Loading…
Reference in New Issue