From e7b390892d5d9ad4b1cf0dc127d72cbe81193c54 Mon Sep 17 00:00:00 2001 From: Louis Mayencourt Date: Fri, 11 Oct 2019 14:31:13 +0100 Subject: [PATCH 1/2] ROMLIB: Optimize memory layout when ROMLIB is used ROMLIB extract functions code from BL images to put them inside ROM. This has for effect to reduce the size of the BL images. This patch take this size reduction into consideration to optimize the memory layout of BL2. A new "PLAT_ARM_BL2_ROMLIB_OPTIMIZATION" macro is defined and used to reduce "PLAT_ARM_MAX_BL2_SIZE". This allows to remove the gap between BL1 and BL2 when ROMLIB is used and provides more room for BL31. The current memory gain is 0x6000 for fvp and 0x8000 for juno. Change-Id: I71c2c2c63b57bce5b22a125efaefc486ff3e87be Signed-off-by: Louis Mayencourt --- plat/arm/board/fvp/include/platform_def.h | 6 ++++-- plat/arm/board/juno/include/platform_def.h | 10 ++++++---- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/plat/arm/board/fvp/include/platform_def.h b/plat/arm/board/fvp/include/platform_def.h index 4f2627704..98dd0a97f 100644 --- a/plat/arm/board/fvp/include/platform_def.h +++ b/plat/arm/board/fvp/include/platform_def.h @@ -94,9 +94,11 @@ #if USE_ROMLIB #define PLAT_ARM_MAX_ROMLIB_RW_SIZE UL(0x1000) #define PLAT_ARM_MAX_ROMLIB_RO_SIZE UL(0xe000) +#define FVP_BL2_ROMLIB_OPTIMIZATION UL(0x6000) #else #define PLAT_ARM_MAX_ROMLIB_RW_SIZE UL(0) #define PLAT_ARM_MAX_ROMLIB_RO_SIZE UL(0) +#define FVP_BL2_ROMLIB_OPTIMIZATION UL(0) #endif /* @@ -104,9 +106,9 @@ * little space for growth. */ #if TRUSTED_BOARD_BOOT -# define PLAT_ARM_MAX_BL2_SIZE UL(0x1D000) +# define PLAT_ARM_MAX_BL2_SIZE (UL(0x1D000) - FVP_BL2_ROMLIB_OPTIMIZATION) #else -# define PLAT_ARM_MAX_BL2_SIZE UL(0x11000) +# define PLAT_ARM_MAX_BL2_SIZE (UL(0x11000) - FVP_BL2_ROMLIB_OPTIMIZATION) #endif /* diff --git a/plat/arm/board/juno/include/platform_def.h b/plat/arm/board/juno/include/platform_def.h index 83aeeb4bd..16bb33d7e 100644 --- a/plat/arm/board/juno/include/platform_def.h +++ b/plat/arm/board/juno/include/platform_def.h @@ -60,9 +60,11 @@ #if USE_ROMLIB #define PLAT_ARM_MAX_ROMLIB_RW_SIZE UL(0x1000) #define PLAT_ARM_MAX_ROMLIB_RO_SIZE UL(0xe000) +#define JUNO_BL2_ROMLIB_OPTIMIZATION UL(0x8000) #else #define PLAT_ARM_MAX_ROMLIB_RW_SIZE UL(0) #define PLAT_ARM_MAX_ROMLIB_RO_SIZE UL(0) +#define JUNO_BL2_ROMLIB_OPTIMIZATION UL(0) #endif /* @@ -127,14 +129,14 @@ */ #if TRUSTED_BOARD_BOOT #if TF_MBEDTLS_KEY_ALG_ID == TF_MBEDTLS_RSA_AND_ECDSA -# define PLAT_ARM_MAX_BL2_SIZE UL(0x1F000) +# define PLAT_ARM_MAX_BL2_SIZE (UL(0x1F000) - JUNO_BL2_ROMLIB_OPTIMIZATION) #elif TF_MBEDTLS_KEY_ALG_ID == TF_MBEDTLS_ECDSA -# define PLAT_ARM_MAX_BL2_SIZE UL(0x1D000) +# define PLAT_ARM_MAX_BL2_SIZE (UL(0x1D000) - JUNO_BL2_ROMLIB_OPTIMIZATION) #else -# define PLAT_ARM_MAX_BL2_SIZE UL(0x1D000) +# define PLAT_ARM_MAX_BL2_SIZE (UL(0x1D000) - JUNO_BL2_ROMLIB_OPTIMIZATION) #endif #else -# define PLAT_ARM_MAX_BL2_SIZE UL(0xF000) +# define PLAT_ARM_MAX_BL2_SIZE (UL(0xF000) - JUNO_BL2_ROMLIB_OPTIMIZATION) #endif /* From 4685b64fc34b3fd23c5d942aeac87fe1ece744e1 Mon Sep 17 00:00:00 2001 From: Louis Mayencourt Date: Fri, 11 Oct 2019 15:27:01 +0100 Subject: [PATCH 2/2] DOC: Update ROMLIB page with memory impact info Complete the Library at ROM documentation with information regarding the memory impact of the feature. Change-Id: I5a10620a8e94f123021bb19523a36d558b330deb Signed-off-by: Louis Mayencourt --- docs/components/romlib-design.rst | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/docs/components/romlib-design.rst b/docs/components/romlib-design.rst index d8bc89cea..e0a028e46 100644 --- a/docs/components/romlib-design.rst +++ b/docs/components/romlib-design.rst @@ -111,6 +111,21 @@ The calling sequence for a patched function is as follows: BL image --> function +Memory impact +~~~~~~~~~~~~~ + +Using library at ROM will modify the memory layout of the BL images: +- The ROM library needs a page aligned RAM section to hold the RW data. This + section is defined by the ROMLIB_RW_BASE and ROMLIB_RW_END macros. + On Arm platforms a section of 1 page (0x1000) is allocated at the top of SRAM. + This will have for effect to shift down all the BL images by 1 page. +- Depending on the functions moved to the ROM library, the size of the BL images + will be reduced. + For example: moving MbedTLS function into the ROM library reduces BL1 and + BL2, but not BL31. +- This change in BL images size can be taken into consideration to optimize the + memory layout when defining the BLx_BASE macros. + Build library at ROM ~~~~~~~~~~~~~~~~~~~~~