rcar_gen3: drivers: swdt: Access SCR in EL3
The code runs in EL3, use EL3 accessors to manipulate the interrupt bit. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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@ -133,7 +133,11 @@ void rcar_swdt_release(void)
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(ARM_IRQ_SEC_WDT & ~ITARGET_MASK);
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uint32_t i;
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/* Disable FIQ interrupt */
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write_daifset(DAIF_FIQ_BIT);
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/* FIQ interrupts are not taken to EL3 */
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write_scr_el3(read_scr_el3() & ~SCR_FIQ_BIT);
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swdt_disable();
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gicv2_cpuif_disable();
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