From 8d2c497715ca8bc60ab390c88fa69ddb4fae5993 Mon Sep 17 00:00:00 2001 From: Achin Gupta Date: Mon, 26 Sep 2016 10:22:56 +0100 Subject: [PATCH] Device tree changes to boot FreeBSD on FVPs FreeBSD does not understand #interrupt-map in a device tree. This prevents the GIC from being set up correctly. This patch removes the #interrupt-map in the device trees for the Base and Foundation FVPs. This enables correct boot of FreeBSD on these platforms. These changes have been tested with FreeBSD and an Ubuntu cloud image (ubuntu-16.04-server-cloudimg-arm64-uefi1.img) to ensure compatibility with Linux. Change-Id: I1347acdcf994ec4b1dd843ba32af9951aa54db73 Signed-off-by: Achin Gupta --- fdts/fvp-base-gicv2-psci-aarch32.dts | 28 +--------- fdts/fvp-base-gicv2-psci.dtb | Bin 10368 -> 9191 bytes fdts/fvp-base-gicv2-psci.dts | 74 +-------------------------- fdts/fvp-base-gicv3-psci-aarch32.dts | 28 +--------- fdts/fvp-base-gicv3-psci.dtb | Bin 10835 -> 9314 bytes fdts/fvp-base-gicv3-psci.dts | 74 +-------------------------- fdts/fvp-foundation-gicv2-psci.dtb | Bin 7673 -> 6448 bytes fdts/fvp-foundation-gicv2-psci.dts | 74 +-------------------------- fdts/fvp-foundation-gicv3-psci.dtb | Bin 8140 -> 6571 bytes fdts/fvp-foundation-gicv3-psci.dts | 74 +-------------------------- fdts/fvp-foundation-motherboard.dtsi | 49 +++++------------- fdts/rtsm_ve-motherboard.dtsi | 59 ++++++--------------- 12 files changed, 41 insertions(+), 419 deletions(-) diff --git a/fdts/fvp-base-gicv2-psci-aarch32.dts b/fdts/fvp-base-gicv2-psci-aarch32.dts index 3a6007de7..1560a000e 100644 --- a/fdts/fvp-base-gicv2-psci-aarch32.dts +++ b/fdts/fvp-base-gicv2-psci-aarch32.dts @@ -1,31 +1,7 @@ /* - * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of ARM nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * SPDX-License-Identifier: BSD-3-Clause */ /dts-v1/; diff --git a/fdts/fvp-base-gicv2-psci.dtb b/fdts/fvp-base-gicv2-psci.dtb index 245a6c33b7f6ce0c45f9c7ec8f01010b850e3b69..d86cb780484610a1d614bee9e1cf8c75241afe29 100644 GIT binary patch delta 1381 zcma)6OK4L;6rFi5{%uUiKec)JDNz(sgIF;lZj2>Ac|s!>CBqh1abGEwbh&4c1P zIl2BFRqXeoR{aNs&LhItOHivwvLb8@c+Udp4-{9(sl17L zl)65k7G6_8VQv?-Qik+VJ9XRRXSdsIyXCjTu>1-%W>h^_kXz!k1*>}nm}Bt@{xGVZ zX7Yu1P);+^c5nD}BW-LcpB`}WRYgP#CTKAX?_Ag^6*=x@Kw+IyUH7cvj_;d=L|p1mn& z=zX?|Z$5YY?s8f1PpE98z@mM%O5$cYZxOosPa*c-U-Z|xn-hx8HRT6sS4roWik}JV zhq%~!!8SS$yP?c!jMXI=hRlQgL8Kp}p?prBqKkP$o}*^IBrj11-_fa0`Dr=z IYU>;M8|!b9JOBUy delta 2608 zcmai#PiRzE6vpp;FV@CCNhX;%$z+ll6Q_U4T)L_B`<`>(`=(UA@aBH^{?0k~-1qK1 z^Q3=ff9c`s*Uyb9%@|{L8?){e`VyWLo(4Q<;bqMK@n>nOt{h@mV~ia{Z;9}%g1nC2 zx1A7}ubIdE-+r>v)5kZ&i5urVW3MboSlMu(kO_E4YGu@(Q7c;}j9S?T!l)BgHfFg% z>I53|p)hJ?wZf>Ctq?}7Y^AW3SicJ5)yF%eR>#%CsFl?TqgGZgj9OWlC&Ir{YK1&8 zo>41n6h^JANf@=Vv@qy$6>Jtrt&VGiQ7g*`qgK`;j9OVM){l4C`X87TM{0F!6Gp8p zCyZKIyD;h+et+LOApGm5R>!ZW&DM z;9UJh`^e4K|5nT4G`#BF=MA6P1$VX~ZCi|C)MT7qFgHLI#a) zzVSjf;K$^J<;CO$B*rlfitd}HuG9iX+#F}SA(z}t)AgcXnAO6EV;t{~iUa?B=|erJ zOHqofL98{jM(GH8&{yg`R5HKSy-a65?K3xdaO2qfp?SyYjfhdsT+6SA+_B#F=ASnB z%vhe@W{q19>xa#wu{HPqKI@#DU9%_lU=e?t2Qm$cbD1POtNMG4JKe3!S8;S!`gc0G z?v^Ax-pISH=Q26B*peg<`zi-+-@nQzc{kj8yxG4>e`Zh+gAVt!HE)aVcDCfYvwLG3 zCd=oI&DHE1o2mGqAXdcD#~+XO{-C7YL|c*{kD_j$Wx6`QXKnf7kKYgV?*d_?HDe!% zMv3>B>&_jl^*h<4$5W@G*XoF{XpRT)KVKK5*yTw{2O(1h0d? z5_dLY?G-QN9O8nY zi=&44*I_`vN{GV0V^+pp&{t&q2{bNkY|q&I2SSjq895xNKt|sE@9LK}Z=;Hum z&}_6vpm5yX$#<WU|(Nk6j`B?hUZ*Oq1Tq(X8g|HI8nH13&&1P ak4#RUo|yjl, <5 0 0 0x10000000 0x04000000>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 63>; - interrupt-map = <0 0 0 &gic 0 0 4>, - <0 0 1 &gic 0 1 4>, - <0 0 2 &gic 0 2 4>, - <0 0 3 &gic 0 3 4>, - <0 0 4 &gic 0 4 4>, - <0 0 5 &gic 0 5 4>, - <0 0 6 &gic 0 6 4>, - <0 0 7 &gic 0 7 4>, - <0 0 8 &gic 0 8 4>, - <0 0 9 &gic 0 9 4>, - <0 0 10 &gic 0 10 4>, - <0 0 11 &gic 0 11 4>, - <0 0 12 &gic 0 12 4>, - <0 0 13 &gic 0 13 4>, - <0 0 14 &gic 0 14 4>, - <0 0 15 &gic 0 15 4>, - <0 0 16 &gic 0 16 4>, - <0 0 17 &gic 0 17 4>, - <0 0 18 &gic 0 18 4>, - <0 0 19 &gic 0 19 4>, - <0 0 20 &gic 0 20 4>, - <0 0 21 &gic 0 21 4>, - <0 0 22 &gic 0 22 4>, - <0 0 23 &gic 0 23 4>, - <0 0 24 &gic 0 24 4>, - <0 0 25 &gic 0 25 4>, - <0 0 26 &gic 0 26 4>, - <0 0 27 &gic 0 27 4>, - <0 0 28 &gic 0 28 4>, - <0 0 29 &gic 0 29 4>, - <0 0 30 &gic 0 30 4>, - <0 0 31 &gic 0 31 4>, - <0 0 32 &gic 0 32 4>, - <0 0 33 &gic 0 33 4>, - <0 0 34 &gic 0 34 4>, - <0 0 35 &gic 0 35 4>, - <0 0 36 &gic 0 36 4>, - <0 0 37 &gic 0 37 4>, - <0 0 38 &gic 0 38 4>, - <0 0 39 &gic 0 39 4>, - <0 0 40 &gic 0 40 4>, - <0 0 41 &gic 0 41 4>, - <0 0 42 &gic 0 42 4>; - /include/ "rtsm_ve-motherboard.dtsi" }; diff --git a/fdts/fvp-base-gicv3-psci-aarch32.dts b/fdts/fvp-base-gicv3-psci-aarch32.dts index ab699151c..dd884f553 100644 --- a/fdts/fvp-base-gicv3-psci-aarch32.dts +++ b/fdts/fvp-base-gicv3-psci-aarch32.dts @@ -1,31 +1,7 @@ /* - * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of ARM nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * SPDX-License-Identifier: BSD-3-Clause */ /dts-v1/; diff --git a/fdts/fvp-base-gicv3-psci.dtb b/fdts/fvp-base-gicv3-psci.dtb index e175bf02e46c4daadcc8889d59f34d0136c7d986..a105ae6691dcb29c282f903e7b2f4d2f2379e700 100644 GIT binary patch delta 1476 zcma)6OK4L;6rD+;_1An%+kD#i@@ojvLSqU=Y-tp+krwSjYVbp~O-WEnBn=|Ch>PxA z2o8b^7ec!zxY91_%2oX=Lv_(jp|}$K&_!`og6F>X<}t5|?S(rt_jB&td*{CQ`O4RP zZ=<#OldQMCAK>Tcti9AG`=Cm0;O0(x8WAD!uuKXoXg=% zG7#|k5-0&N7$n4vVAIXFOf%daOq4_Q5UydZV7CF%!2wwPPs0fx-N3;Vu}_cKA71EH zGdl_kg2@~l6ppeb#9;~}cEXeOAh5C)XmtcOcEmiBH;@huyB91;>Zz@yr(B3gPbFm7 zN~bChL!kDP{SfSCHf}2=REd<h5#%O|P+%6yucL}xB^!#mwl`{f7wW(sD5Q@J z=OgyJ4(JhvYCAs8#LmklJ~Nf@(7#>^Ox2 z(M}I8BSiGhcw=d?skI0Z%}3No=1AyIuSXJFQH}eBH#TP*Sb8z}YS`t7C*Tf}nwzw9hE7{||i(8nL;-dC^jU{)xlci^r$glj&!k8!tc zBRbG$Q-2wVH@njX_=SzWykw&-nHcOSLrpTwA7z3$V#IIc!4#}ryi=5cX8BMVLrpTX z9Sk+e%yBT(DrEjj2SiNG7B6GHOW*v7;0p~ z{BZ|FO$Oqd7k#eOB*Ql}%21Qcq7oD4R}>|bEJ5h`jhbX?U`LZtlT59Hq2@C|{yGOl zO$MrWFw`W|;9#gprcp9>{S+m%SVHKtQIkvxc69aBB$IY9)GSlX-{gR(SqNR#>|m%# zCgWhJNhVv)`0J-Ap_Xz8mQvIt(+WGfdTNqsb1>9O4Dv5=K-5Z*Qtb|gnq)d03^mCt zjWS$6MG3LcM^{EoGMx^Fnq;~h3^g)(cx3#<;Mmc`$iUcf*u^sg1NyDW#`n)+Z->dp zFY8a{d;CEa?F*pd=HbHCEmL$r3u?N)tJ!SHV4Eom-L%(_`b;)|5 zf`F=7G+iBIp$LM;T1+-s(B0-mvcuM}C2j+_S`TA0Po|iMx zt)`=4a~Pke=kGlx8cOl8${FZv(|dkGxRoH?^Kheh*9`b$Y zGY8^r;dXib!Jthr2>V2!aeM@Q+`|Cp(Ptx%K;A{OEZe59m|fY7zGgWLtq}kK diff --git a/fdts/fvp-base-gicv3-psci.dts b/fdts/fvp-base-gicv3-psci.dts index 57f351615..d81bfbb7b 100644 --- a/fdts/fvp-base-gicv3-psci.dts +++ b/fdts/fvp-base-gicv3-psci.dts @@ -1,31 +1,7 @@ /* - * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of ARM nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * SPDX-License-Identifier: BSD-3-Clause */ /dts-v1/; @@ -266,52 +242,6 @@ <4 0 0 0x0c000000 0x04000000>, <5 0 0 0x10000000 0x04000000>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 63>; - interrupt-map = <0 0 0 &gic 0 0 0 0 4>, - <0 0 1 &gic 0 0 0 1 4>, - <0 0 2 &gic 0 0 0 2 4>, - <0 0 3 &gic 0 0 0 3 4>, - <0 0 4 &gic 0 0 0 4 4>, - <0 0 5 &gic 0 0 0 5 4>, - <0 0 6 &gic 0 0 0 6 4>, - <0 0 7 &gic 0 0 0 7 4>, - <0 0 8 &gic 0 0 0 8 4>, - <0 0 9 &gic 0 0 0 9 4>, - <0 0 10 &gic 0 0 0 10 4>, - <0 0 11 &gic 0 0 0 11 4>, - <0 0 12 &gic 0 0 0 12 4>, - <0 0 13 &gic 0 0 0 13 4>, - <0 0 14 &gic 0 0 0 14 4>, - <0 0 15 &gic 0 0 0 15 4>, - <0 0 16 &gic 0 0 0 16 4>, - <0 0 17 &gic 0 0 0 17 4>, - <0 0 18 &gic 0 0 0 18 4>, - <0 0 19 &gic 0 0 0 19 4>, - <0 0 20 &gic 0 0 0 20 4>, - <0 0 21 &gic 0 0 0 21 4>, - <0 0 22 &gic 0 0 0 22 4>, - <0 0 23 &gic 0 0 0 23 4>, - <0 0 24 &gic 0 0 0 24 4>, - <0 0 25 &gic 0 0 0 25 4>, - <0 0 26 &gic 0 0 0 26 4>, - <0 0 27 &gic 0 0 0 27 4>, - <0 0 28 &gic 0 0 0 28 4>, - <0 0 29 &gic 0 0 0 29 4>, - <0 0 30 &gic 0 0 0 30 4>, - <0 0 31 &gic 0 0 0 31 4>, - <0 0 32 &gic 0 0 0 32 4>, - <0 0 33 &gic 0 0 0 33 4>, - <0 0 34 &gic 0 0 0 34 4>, - <0 0 35 &gic 0 0 0 35 4>, - <0 0 36 &gic 0 0 0 36 4>, - <0 0 37 &gic 0 0 0 37 4>, - <0 0 38 &gic 0 0 0 38 4>, - <0 0 39 &gic 0 0 0 39 4>, - <0 0 40 &gic 0 0 0 40 4>, - <0 0 41 &gic 0 0 0 41 4>, - <0 0 42 &gic 0 0 0 42 4>; - /include/ "rtsm_ve-motherboard.dtsi" }; diff --git a/fdts/fvp-foundation-gicv2-psci.dtb b/fdts/fvp-foundation-gicv2-psci.dtb index 5acb139a3cc99c30314df26296bd4246b2972070..9d0cb92846a35050020ccb6cdfef052955f04d6b 100644 GIT binary patch delta 726 zcmexqy}?N10`I@K3=EP63=9k&3=CpRfV2h>3j(nK5CZ{I4^TX2qed|IJCs z1i~jj7Kjk!VPIe^fv92N2huE)T?EY;w@t1QlxI9Vd5&PZ;x?!(Ge{Pwx}JgG$pOd) z@qs#ks#Jv1fjWAGKswe4{pY;~l?ADOHhG6|ofP9Ipb#eza{)0oR9YM;{d01Fh_WEa z3Pz|X&=WvoT0|BbB0G&0C<`;; z)h?i`2)l5SII1R~9t=&OU_$lQ1o3QHL{{kbMaNQfOX1 delta 2002 zcmai#J!lj`7=~xoi!ttP_Wt%vF6QrI;w2!&{Gec=C>r5n5EKKcjC!0BVvh4fY~035 zteh(?gtQS9#X{_~NNE>K3oF4+kTmM|9yh!1S(t%ko|)(SW_RayzI!#Zd#d!=`~5?y z!Cj@)MWqH7r7y{qmMbNfH0PzvCtjDXxZyq-CX~`k(rdXeP6}>HZ`)}BnNPfx`FD1* z-6O{~Stn|kw+=l!Cw8I2fF&NlCW6_4tpl^`A_r!-pBy-Lp;Fx>!Ld~8068$b9&%uI z2g!lix#V2Ae}|Ni5@vHyIyi&c0M^UyAWT5-BK`1d@m4Eh3dn^Y`qUOA+WIXqf@xlA!{feWVZnNF{sNmpWplqN#pd?^1 z`F5Rxx$cjpaSOaLW~W>`$(v7FjA6Q>mc8*AqUkdJWChNlhpYr0Yz_*glZIw zBDhCz(Y#N`tD`dhH^EG2;^if{BO05~@$hClvliG_#oq(gmRjLt&E@QnBRf>fKA5)w zkWqjzswR@qW8N+;$E}rFGK;zLxXqTn6(xPNlgN^XLUbx;zU0c$r!Zyaf`#J~v)5)N zB+8ptGb=A>e2K;~?NrQGu%I8BpTRlZG$-?A-F)*n|51-TGoW9zFmx$dp0 Kjwy4Y@B3dgHgL57 diff --git a/fdts/fvp-foundation-gicv2-psci.dts b/fdts/fvp-foundation-gicv2-psci.dts index 021529028..03b61dd73 100644 --- a/fdts/fvp-foundation-gicv2-psci.dts +++ b/fdts/fvp-foundation-gicv2-psci.dts @@ -1,31 +1,7 @@ /* - * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of ARM nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * SPDX-License-Identifier: BSD-3-Clause */ /dts-v1/; @@ -206,52 +182,6 @@ <4 0 0 0x0c000000 0x04000000>, <5 0 0 0x10000000 0x04000000>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 63>; - interrupt-map = <0 0 0 &gic 0 0 4>, - <0 0 1 &gic 0 1 4>, - <0 0 2 &gic 0 2 4>, - <0 0 3 &gic 0 3 4>, - <0 0 4 &gic 0 4 4>, - <0 0 5 &gic 0 5 4>, - <0 0 6 &gic 0 6 4>, - <0 0 7 &gic 0 7 4>, - <0 0 8 &gic 0 8 4>, - <0 0 9 &gic 0 9 4>, - <0 0 10 &gic 0 10 4>, - <0 0 11 &gic 0 11 4>, - <0 0 12 &gic 0 12 4>, - <0 0 13 &gic 0 13 4>, - <0 0 14 &gic 0 14 4>, - <0 0 15 &gic 0 15 4>, - <0 0 16 &gic 0 16 4>, - <0 0 17 &gic 0 17 4>, - <0 0 18 &gic 0 18 4>, - <0 0 19 &gic 0 19 4>, - <0 0 20 &gic 0 20 4>, - <0 0 21 &gic 0 21 4>, - <0 0 22 &gic 0 22 4>, - <0 0 23 &gic 0 23 4>, - <0 0 24 &gic 0 24 4>, - <0 0 25 &gic 0 25 4>, - <0 0 26 &gic 0 26 4>, - <0 0 27 &gic 0 27 4>, - <0 0 28 &gic 0 28 4>, - <0 0 29 &gic 0 29 4>, - <0 0 30 &gic 0 30 4>, - <0 0 31 &gic 0 31 4>, - <0 0 32 &gic 0 32 4>, - <0 0 33 &gic 0 33 4>, - <0 0 34 &gic 0 34 4>, - <0 0 35 &gic 0 35 4>, - <0 0 36 &gic 0 36 4>, - <0 0 37 &gic 0 37 4>, - <0 0 38 &gic 0 38 4>, - <0 0 39 &gic 0 39 4>, - <0 0 40 &gic 0 40 4>, - <0 0 41 &gic 0 41 4>, - <0 0 42 &gic 0 42 4>; - /include/ "fvp-foundation-motherboard.dtsi" }; }; diff --git a/fdts/fvp-foundation-gicv3-psci.dtb b/fdts/fvp-foundation-gicv3-psci.dtb index 34bf8db662ccd190da6de31ab70f491b6d38c54d..a3164ab40bdbae63f32bc8f5a997d9e7845cfb30 100644 GIT binary patch delta 754 zcmX?OzuH*$0`I@K3=ER185kHm7#PF_fV2h>3j#5S4FpWH85qP)fLINa<#}W_dd}mP zWX#Pk$w)0q%10D09QDInknVwTAq!sd)eCp!qs zGhUjUAe;_lp8&I8fY|{eAn^i`e|(Hjfy!Y9ew|z+S}(~66yXG7E+FQH%8CPB#xYq$ zOj+K%txx_g6vD`}lJ?c|2 delta 2279 zcmai#&ubGw6vt=R{xrXTt*NG_rnX56foc@J^`O#%Qave%pw*TrS`*TU2M_V+Q9D-; zfq3(zUVEqqZ#jtm4?PHiP!LbW_swQDZ`X$%80NjteCEy0ZaRHm?JX6*Mh<=|mG3E~ zR+O5K(^#UOppKZDy`xm_Lvc5B@d#xjN?EHkTGWw;Df~#IX-gCk9|Qj~fNv_fHm&m- z)}r%+&L;ZVB85Aho2viOZ2J!d5vJ)i3koDccOv=2FKe!CP-ks5Po>U?+V5p{6K>a z7GC~_MZchZyxHv{8NMsUDfXRyB`NMO9sF~I@jPF8ThxHH8abACWB z9p@6oXkgqqL3!}>VBE)}T8exknCT&KMMKZ7Q$@7v*9qX<^@weW*UL@#JMrgy^^tUdiFoVWIMHd3Sb zWdw1jA5TOPm!bzz8<+3kwznO9F4msHXTdFrTM(BVX6Y}-F6&-wHnB$;jtja-;r@2K zTQ>XRw#Nir#5T%cxhX-{3YB=0DCpnuE8YsT{r^_fJRAQ74zE9-9M-40hpc#;tX0hO zlkBtc8hp?He7#=NjYL-8NL|mERrX*N-DP$`@1*ipS-(z~$Qjq6^or-<$, <5 0 0 0x10000000 0x04000000>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 63>; - interrupt-map = <0 0 0 &gic 0 0 0 0 4>, - <0 0 1 &gic 0 0 0 1 4>, - <0 0 2 &gic 0 0 0 2 4>, - <0 0 3 &gic 0 0 0 3 4>, - <0 0 4 &gic 0 0 0 4 4>, - <0 0 5 &gic 0 0 0 5 4>, - <0 0 6 &gic 0 0 0 6 4>, - <0 0 7 &gic 0 0 0 7 4>, - <0 0 8 &gic 0 0 0 8 4>, - <0 0 9 &gic 0 0 0 9 4>, - <0 0 10 &gic 0 0 0 10 4>, - <0 0 11 &gic 0 0 0 11 4>, - <0 0 12 &gic 0 0 0 12 4>, - <0 0 13 &gic 0 0 0 13 4>, - <0 0 14 &gic 0 0 0 14 4>, - <0 0 15 &gic 0 0 0 15 4>, - <0 0 16 &gic 0 0 0 16 4>, - <0 0 17 &gic 0 0 0 17 4>, - <0 0 18 &gic 0 0 0 18 4>, - <0 0 19 &gic 0 0 0 19 4>, - <0 0 20 &gic 0 0 0 20 4>, - <0 0 21 &gic 0 0 0 21 4>, - <0 0 22 &gic 0 0 0 22 4>, - <0 0 23 &gic 0 0 0 23 4>, - <0 0 24 &gic 0 0 0 24 4>, - <0 0 25 &gic 0 0 0 25 4>, - <0 0 26 &gic 0 0 0 26 4>, - <0 0 27 &gic 0 0 0 27 4>, - <0 0 28 &gic 0 0 0 28 4>, - <0 0 29 &gic 0 0 0 29 4>, - <0 0 30 &gic 0 0 0 30 4>, - <0 0 31 &gic 0 0 0 31 4>, - <0 0 32 &gic 0 0 0 32 4>, - <0 0 33 &gic 0 0 0 33 4>, - <0 0 34 &gic 0 0 0 34 4>, - <0 0 35 &gic 0 0 0 35 4>, - <0 0 36 &gic 0 0 0 36 4>, - <0 0 37 &gic 0 0 0 37 4>, - <0 0 38 &gic 0 0 0 38 4>, - <0 0 39 &gic 0 0 0 39 4>, - <0 0 40 &gic 0 0 0 40 4>, - <0 0 41 &gic 0 0 0 41 4>, - <0 0 42 &gic 0 0 0 42 4>; - /include/ "fvp-foundation-motherboard.dtsi" }; }; diff --git a/fdts/fvp-foundation-motherboard.dtsi b/fdts/fvp-foundation-motherboard.dtsi index cc4df211f..ae7237b71 100644 --- a/fdts/fvp-foundation-motherboard.dtsi +++ b/fdts/fvp-foundation-motherboard.dtsi @@ -1,31 +1,7 @@ /* - * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of ARM nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * SPDX-License-Identifier: BSD-3-Clause */ motherboard { @@ -33,13 +9,12 @@ compatible = "arm,vexpress,v2m-p1", "simple-bus"; #address-cells = <2>; /* SMB chipselect number and offset */ #size-cells = <1>; - #interrupt-cells = <1>; ranges; ethernet@2,02000000 { compatible = "smsc,lan91c111"; reg = <2 0x02000000 0x10000>; - interrupts = <15>; + interrupts = <0 15 4>; }; v2m_clk24mhz: clk24mhz { @@ -88,7 +63,7 @@ v2m_serial0: uart@090000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x090000 0x1000>; - interrupts = <5>; + interrupts = <0 5 4>; clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; clock-names = "uartclk", "apb_pclk"; }; @@ -96,7 +71,7 @@ v2m_serial1: uart@0a0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0a0000 0x1000>; - interrupts = <6>; + interrupts = <0 6 4>; clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; clock-names = "uartclk", "apb_pclk"; }; @@ -104,7 +79,7 @@ v2m_serial2: uart@0b0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0b0000 0x1000>; - interrupts = <7>; + interrupts = <0 7 4>; clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; clock-names = "uartclk", "apb_pclk"; }; @@ -112,7 +87,7 @@ v2m_serial3: uart@0c0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0c0000 0x1000>; - interrupts = <8>; + interrupts = <0 8 4>; clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; clock-names = "uartclk", "apb_pclk"; }; @@ -120,7 +95,7 @@ wdt@0f0000 { compatible = "arm,sp805", "arm,primecell"; reg = <0x0f0000 0x1000>; - interrupts = <0>; + interrupts = <0 0 4>; clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>; clock-names = "wdogclk", "apb_pclk"; }; @@ -128,7 +103,7 @@ v2m_timer01: timer@110000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x110000 0x1000>; - interrupts = <2>; + interrupts = <0 2 4>; clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>; clock-names = "timclken1", "timclken2", "apb_pclk"; }; @@ -136,7 +111,7 @@ v2m_timer23: timer@120000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x120000 0x1000>; - interrupts = <3>; + interrupts = <0 3 4>; clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>; clock-names = "timclken1", "timclken2", "apb_pclk"; }; @@ -144,7 +119,7 @@ rtc@170000 { compatible = "arm,pl031", "arm,primecell"; reg = <0x170000 0x1000>; - interrupts = <4>; + interrupts = <0 4 4>; clocks = <&v2m_clk24mhz>; clock-names = "apb_pclk"; }; @@ -152,7 +127,7 @@ virtio_block@0130000 { compatible = "virtio,mmio"; reg = <0x130000 0x1000>; - interrupts = <0x2a>; + interrupts = <0 0x2a 4>; }; }; diff --git a/fdts/rtsm_ve-motherboard.dtsi b/fdts/rtsm_ve-motherboard.dtsi index 6aa40ff4b..8baa829aa 100644 --- a/fdts/rtsm_ve-motherboard.dtsi +++ b/fdts/rtsm_ve-motherboard.dtsi @@ -1,31 +1,7 @@ /* - * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of ARM nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * SPDX-License-Identifier: BSD-3-Clause */ motherboard { @@ -33,7 +9,6 @@ compatible = "arm,vexpress,v2m-p1", "simple-bus"; #address-cells = <2>; /* SMB chipselect number and offset */ #size-cells = <1>; - #interrupt-cells = <1>; ranges; flash@0,00000000 { @@ -51,7 +26,7 @@ ethernet@2,02000000 { compatible = "smsc,lan91c111"; reg = <2 0x02000000 0x10000>; - interrupts = <15>; + interrupts = <0 15 4>; }; v2m_clk24mhz: clk24mhz { @@ -100,7 +75,7 @@ aaci@040000 { compatible = "arm,pl041", "arm,primecell"; reg = <0x040000 0x1000>; - interrupts = <11>; + interrupts = <0 11 4>; clocks = <&v2m_clk24mhz>; clock-names = "apb_pclk"; }; @@ -108,7 +83,7 @@ mmci@050000 { compatible = "arm,pl180", "arm,primecell"; reg = <0x050000 0x1000>; - interrupts = <9 10>; + interrupts = <0 9 4 0 10 4>; cd-gpios = <&v2m_sysreg 0 0>; wp-gpios = <&v2m_sysreg 1 0>; max-frequency = <12000000>; @@ -120,7 +95,7 @@ kmi@060000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x060000 0x1000>; - interrupts = <12>; + interrupts = <0 12 4>; clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; clock-names = "KMIREFCLK", "apb_pclk"; }; @@ -128,7 +103,7 @@ kmi@070000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x070000 0x1000>; - interrupts = <13>; + interrupts = <0 13 4>; clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; clock-names = "KMIREFCLK", "apb_pclk"; }; @@ -136,7 +111,7 @@ v2m_serial0: uart@090000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x090000 0x1000>; - interrupts = <5>; + interrupts = <0 5 4>; clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; clock-names = "uartclk", "apb_pclk"; }; @@ -144,7 +119,7 @@ v2m_serial1: uart@0a0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0a0000 0x1000>; - interrupts = <6>; + interrupts = <0 6 4>; clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; clock-names = "uartclk", "apb_pclk"; }; @@ -152,7 +127,7 @@ v2m_serial2: uart@0b0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0b0000 0x1000>; - interrupts = <7>; + interrupts = <0 7 4>; clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; clock-names = "uartclk", "apb_pclk"; }; @@ -160,7 +135,7 @@ v2m_serial3: uart@0c0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0c0000 0x1000>; - interrupts = <8>; + interrupts = <0 8 4>; clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; clock-names = "uartclk", "apb_pclk"; }; @@ -168,7 +143,7 @@ wdt@0f0000 { compatible = "arm,sp805", "arm,primecell"; reg = <0x0f0000 0x1000>; - interrupts = <0>; + interrupts = <0 0 4>; clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>; clock-names = "wdogclk", "apb_pclk"; }; @@ -176,7 +151,7 @@ v2m_timer01: timer@110000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x110000 0x1000>; - interrupts = <2>; + interrupts = <0 2 4>; clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>; clock-names = "timclken1", "timclken2", "apb_pclk"; }; @@ -184,7 +159,7 @@ v2m_timer23: timer@120000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x120000 0x1000>; - interrupts = <3>; + interrupts = <0 3 4>; clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>; clock-names = "timclken1", "timclken2", "apb_pclk"; }; @@ -192,7 +167,7 @@ rtc@170000 { compatible = "arm,pl031", "arm,primecell"; reg = <0x170000 0x1000>; - interrupts = <4>; + interrupts = <0 4 4>; clocks = <&v2m_clk24mhz>; clock-names = "apb_pclk"; }; @@ -200,7 +175,7 @@ clcd@1f0000 { compatible = "arm,pl111", "arm,primecell"; reg = <0x1f0000 0x1000>; - interrupts = <14>; + interrupts = <0 14 4>; clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>; clock-names = "clcdclk", "apb_pclk"; mode = "XVGA"; @@ -211,7 +186,7 @@ virtio_block@0130000 { compatible = "virtio,mmio"; reg = <0x130000 0x1000>; - interrupts = <0x2a>; + interrupts = <0 0x2a 4>; }; };