From b85359296c4ca6b8a931870a867d5cc658c778ff Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Fri, 11 Sep 2020 09:18:09 +0100 Subject: [PATCH] SPE: Fix feature detection Currently the feature test for the SPE extension requires the feature bits in the ID_AA64DFR0 register to read exactly 0b0001. However the architecture guarantees that any values greater than 0 indicate the presence of a feature, which is what we are after in our spe_supported() function. Change the comparison to include all values greater than 0. This fixes SPE support in non-secure world on implementations which include the Scalable Vector Extension (SVE), for instance on Zeus cores. Change-Id: If6cbd1b72d6abb8a303e2c0a7839d508f071cdbe Signed-off-by: Andre Przywara --- lib/extensions/spe/spe.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/extensions/spe/spe.c b/lib/extensions/spe/spe.c index 78876c66b..f0d734223 100644 --- a/lib/extensions/spe/spe.c +++ b/lib/extensions/spe/spe.c @@ -25,7 +25,7 @@ bool spe_supported(void) uint64_t features; features = read_id_aa64dfr0_el1() >> ID_AA64DFR0_PMS_SHIFT; - return (features & ID_AA64DFR0_PMS_MASK) == 1U; + return (features & ID_AA64DFR0_PMS_MASK) > 0ULL; } void spe_enable(bool el2_unused)