FWU: Add Generic BL2U FWU image support in BL2
The Firmware Update (FWU) feature needs support for an optional
secure world image, BL2U, to allow additional secure world
initialization required by FWU, for example DDR initialization.
This patch adds generic framework support to create BL2U.
NOTE: A platform makefile must supply additional `BL2U_SOURCES`
to build the bl2u target. A subsequent patch adds bl2u
support for ARM platforms.
Change-Id: If2ce036199bb40b39b7f91a9332106bcd4e25413
This commit is contained in:
Yatharth Kochar
parent
436223def6
commit
9003fa0b0c
12
Makefile
12
Makefile
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@ -410,6 +410,11 @@ NEED_BL2 := yes
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include bl2/bl2.mk
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endif
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ifdef BL2U_SOURCES
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NEED_BL2U := yes
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include bl2u/bl2u.mk
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endif
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ifdef BL31_SOURCES
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# When booting an EL3 payload, there is no need to compile the BL31 image nor
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# put it in the FIP.
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@ -467,6 +472,12 @@ ifeq (${NEED_BL33},yes)
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$(eval $(call FIP_ADD_IMG,BL33,--bl33))
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endif
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ifeq (${NEED_BL2U},yes)
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BL2U_PATH := $(if ${BL2U},${BL2U},$(call IMG_BIN,2u))
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$(if ${BL2U}, ,$(eval $(call MAKE_BL,2u)))
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$(eval $(call FWU_FIP_ADD_PAYLOAD,${BL2U_PATH},--bl2u))
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endif
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locate-checkpatch:
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ifndef CHECKPATCH
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$(error "Please set CHECKPATCH to point to the Linux checkpatch.pl file, eg: CHECKPATCH=../linux/script/checkpatch.pl")
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@ -552,6 +563,7 @@ help:
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@echo " all Build all individual bootloader binaries"
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@echo " bl1 Build the BL1 binary"
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@echo " bl2 Build the BL2 binary"
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@echo " bl2u Build the BL2U binary"
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@echo " bl31 Build the BL3-1 binary"
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@echo " bl32 Build the BL3-2 binary"
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@echo " certificates Build the certificates (requires 'GENERATE_COT=1')"
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@ -0,0 +1,127 @@
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/*
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* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arch.h>
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#include <asm_macros.S>
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#include <bl_common.h>
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.globl bl2u_entrypoint
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func bl2u_entrypoint
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/*---------------------------------------------
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* Store the extents of the tzram available to
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* BL2U and other platform specific information
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* for future use. x0 is currently not used.
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* ---------------------------------------------
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*/
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mov x20, x1
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mov x21, x2
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/* ---------------------------------------------
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* Set the exception vector to something sane.
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* ---------------------------------------------
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*/
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adr x0, early_exceptions
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msr vbar_el1, x0
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isb
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/* ---------------------------------------------
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* Enable the SError interrupt now that the
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* exception vectors have been setup.
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* ---------------------------------------------
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*/
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msr daifclr, #DAIF_ABT_BIT
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/* ---------------------------------------------
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* Enable the instruction cache, stack pointer
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* and data access alignment checks
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* ---------------------------------------------
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*/
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mov x1, #(SCTLR_I_BIT | SCTLR_A_BIT | SCTLR_SA_BIT)
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mrs x0, sctlr_el1
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orr x0, x0, x1
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msr sctlr_el1, x0
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isb
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/* ---------------------------------------------
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* Invalidate the RW memory used by the BL2U
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* image. This includes the data and NOBITS
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* sections. This is done to safeguard against
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* possible corruption of this memory by dirty
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* cache lines in a system cache as a result of
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* use by an earlier boot loader stage.
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* ---------------------------------------------
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*/
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adr x0, __RW_START__
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adr x1, __RW_END__
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sub x1, x1, x0
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bl inv_dcache_range
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/* ---------------------------------------------
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* Zero out NOBITS sections. There are 2 of them:
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* - the .bss section;
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* - the coherent memory section.
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* ---------------------------------------------
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*/
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ldr x0, =__BSS_START__
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ldr x1, =__BSS_SIZE__
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bl zeromem16
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/* --------------------------------------------
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* Allocate a stack whose memory will be marked
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* as Normal-IS-WBWA when the MMU is enabled.
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* There is no risk of reading stale stack
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* memory after enabling the MMU as only the
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* primary cpu is running at the moment.
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* --------------------------------------------
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*/
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bl plat_set_my_stack
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/* ---------------------------------------------
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* Perform early platform setup & platform
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* specific early arch. setup e.g. mmu setup
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* ---------------------------------------------
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*/
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mov x0, x20
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mov x1, x21
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bl bl2u_early_platform_setup
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bl bl2u_plat_arch_setup
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/* ---------------------------------------------
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* Jump to bl2u_main function.
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* ---------------------------------------------
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*/
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bl bl2u_main
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_panic:
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b _panic
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endfunc bl2u_entrypoint
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@ -0,0 +1,134 @@
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/*
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* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <platform_def.h>
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OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT)
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OUTPUT_ARCH(PLATFORM_LINKER_ARCH)
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ENTRY(bl2u_entrypoint)
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MEMORY {
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RAM (rwx): ORIGIN = BL2U_BASE, LENGTH = BL2U_LIMIT - BL2U_BASE
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}
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SECTIONS
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{
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. = BL2U_BASE;
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ASSERT(. == ALIGN(4096),
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"BL2U_BASE address is not aligned on a page boundary.")
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ro . : {
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__RO_START__ = .;
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*bl2u_entrypoint.o(.text*)
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*(.text*)
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*(.rodata*)
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*(.vectors)
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__RO_END_UNALIGNED__ = .;
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/*
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* Memory page(s) mapped to this section will be marked as
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* read-only, executable. No RW data from the next section must
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* creep in. Ensure the rest of the current memory page is unused.
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*/
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. = NEXT(4096);
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__RO_END__ = .;
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} >RAM
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/*
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* Define a linker symbol to mark start of the RW memory area for this
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* image.
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*/
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__RW_START__ = . ;
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.data . : {
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__DATA_START__ = .;
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*(.data*)
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__DATA_END__ = .;
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} >RAM
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stacks (NOLOAD) : {
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__STACKS_START__ = .;
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*(tzfw_normal_stacks)
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__STACKS_END__ = .;
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} >RAM
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/*
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* The .bss section gets initialised to 0 at runtime.
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* Its base address must be 16-byte aligned.
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*/
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.bss : ALIGN(16) {
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__BSS_START__ = .;
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*(SORT_BY_ALIGNMENT(.bss*))
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*(COMMON)
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__BSS_END__ = .;
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} >RAM
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/*
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* The xlat_table section is for full, aligned page tables (4K).
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* Removing them from .bss avoids forcing 4K alignment on
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* the .bss section and eliminates the unecessary zero init
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*/
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xlat_table (NOLOAD) : {
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*(xlat_table)
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} >RAM
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#if USE_COHERENT_MEM
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/*
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* The base address of the coherent memory section must be page-aligned (4K)
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* to guarantee that the coherent data are stored on their own pages and
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* are not mixed with normal data. This is required to set up the correct
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* memory attributes for the coherent data page tables.
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*/
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coherent_ram (NOLOAD) : ALIGN(4096) {
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__COHERENT_RAM_START__ = .;
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*(tzfw_coherent_mem)
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__COHERENT_RAM_END_UNALIGNED__ = .;
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/*
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* Memory page(s) mapped to this section will be marked
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* as device memory. No other unexpected data must creep in.
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* Ensure the rest of the current memory page is unused.
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*/
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. = NEXT(4096);
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__COHERENT_RAM_END__ = .;
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} >RAM
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#endif
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/*
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* Define a linker symbol to mark end of the RW memory area for this
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* image.
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*/
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__RW_END__ = .;
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__BL2U_END__ = .;
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__BSS_SIZE__ = SIZEOF(.bss);
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ASSERT(. <= BL2U_LIMIT, "BL2U image has exceeded its limit.")
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}
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@ -0,0 +1,35 @@
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#
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# Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are met:
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#
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# Redistributions of source code must retain the above copyright notice, this
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# list of conditions and the following disclaimer.
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#
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# Redistributions in binary form must reproduce the above copyright notice,
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# this list of conditions and the following disclaimer in the documentation
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# and/or other materials provided with the distribution.
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#
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# Neither the name of ARM nor the names of its contributors may be used
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# to endorse or promote products derived from this software without specific
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# prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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BL2U_SOURCES += bl2u/bl2u_main.c \
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bl2u/aarch64/bl2u_entrypoint.S \
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common/aarch64/early_exceptions.S
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BL2U_LINKERFILE := bl2u/bl2u.ld.S
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@ -0,0 +1,74 @@
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/*
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* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
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*
|
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* Redistributions in binary form must reproduce the above copyright notice,
|
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* this list of conditions and the following disclaimer in the documentation
|
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* and/or other materials provided with the distribution.
|
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*
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* Neither the name of ARM nor the names of its contributors may be used
|
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* to endorse or promote products derived from this software without specific
|
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* prior written permission.
|
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arch.h>
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#include <arch_helpers.h>
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#include <assert.h>
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#include <auth_mod.h>
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#include <bl_common.h>
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#include <bl1.h>
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#include <debug.h>
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#include <platform.h>
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#include <platform_def.h>
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#include <stdint.h>
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/*******************************************************************************
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* This function is responsible to:
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* Load SCP_BL2U if platform has defined SCP_BL2U_BASE
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* Perform platform setup.
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* Go back to EL3.
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******************************************************************************/
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void bl2u_main(void)
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{
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NOTICE("BL2U: %s\n", version_string);
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NOTICE("BL2U: %s\n", build_message);
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#if SCP_BL2U_BASE
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int rc;
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/* Load the subsequent bootloader images */
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rc = bl2u_plat_handle_scp_bl2u();
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if (rc) {
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ERROR("Failed to load SCP_BL2U (%i)\n", rc);
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panic();
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}
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#endif
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/* Perform platform setup in BL2U after loading SCP_BL2U */
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bl2u_platform_setup();
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/*
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* Indicate that BL2U is done and resume back to
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* normal world via an SMC to BL1.
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* x1 could be passed to Normal world,
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* so DO NOT pass any secret information.
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*/
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smc(FWU_SMC_SEC_IMAGE_DONE, 0, 0, 0, 0, 0, 0, 0);
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wfi();
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}
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@ -150,6 +150,8 @@ extern unsigned long __RO_START__;
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extern unsigned long __RO_END__;
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#if IMAGE_BL2
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extern unsigned long __BL2_END__;
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#elif IMAGE_BL2U
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extern unsigned long __BL2U_END__;
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#elif IMAGE_BL31
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extern unsigned long __BL31_END__;
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#elif IMAGE_BL32
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@ -192,6 +192,23 @@ void bl2_plat_get_bl32_meminfo(struct meminfo *mem_info);
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* Optional BL2 functions (may be overridden)
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******************************************************************************/
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/*******************************************************************************
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* Mandatory BL2U functions.
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******************************************************************************/
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void bl2u_early_platform_setup(struct meminfo *mem_layout,
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void *plat_info);
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void bl2u_plat_arch_setup(void);
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void bl2u_platform_setup(void);
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/*******************************************************************************
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* Conditionally mandatory BL2U functions for CSS platforms.
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******************************************************************************/
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/*
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* This function is used to perform any platform-specific actions required to
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* handle the BL2U_SCP firmware.
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*/
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int bl2u_plat_handle_scp_bl2u(void);
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/*******************************************************************************
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* Mandatory BL3-1 functions
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******************************************************************************/
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@ -139,7 +139,7 @@ $(strip $(foreach goal,$(1),$(filter $(goal),$(MAKECMDGOALS))))
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endef
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# List of rules that involve building things
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BUILD_TARGETS := all bl1 bl2 bl31 bl32 certificates fip
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BUILD_TARGETS := all bl1 bl2 bl2u bl31 bl32 certificates fip
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# Does the list of goals specified on the command line include a build target?
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ifneq ($(call match_goals,${BUILD_TARGETS}),)
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|
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@ -114,3 +114,9 @@ ifneq (${BL33},)
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$(eval $(call FIP_ADD_PAYLOAD,${BUILD_PLAT}/bl33.crt,--bl33-cert))
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$(eval $(call FIP_ADD_PAYLOAD,${BUILD_PLAT}/bl33_key.crt,--bl33-key-cert))
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endif
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# Add the BL2U image
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ifeq (${NEED_BL2U},yes)
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||||
$(if ${BL2U},$(eval $(call FWU_CERT_ADD_CMD_OPT,${BL2U},--bl2u)),\
|
||||
$(eval $(call FWU_CERT_ADD_CMD_OPT,$(call IMG_BIN,2u),--bl2u)))
|
||||
endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue