diff --git a/plat/fvp/aarch64/bl1_plat_helpers.S b/plat/fvp/aarch64/bl1_plat_helpers.S
index e3cf5c807..c487f0335 100644
--- a/plat/fvp/aarch64/bl1_plat_helpers.S
+++ b/plat/fvp/aarch64/bl1_plat_helpers.S
@@ -66,22 +66,6 @@ plat_secondary_cold_boot_setup: ; .type plat_secondary_cold_boot_setup, %functio
 	bl	platform_get_core_pos
 	mov	x20, x0
 
-	/* ---------------------------------------------
-	 * Mark this cpu as being present. This is a
-	 * SO write. This array will be read using
-	 * normal memory so invalidate any prefetched
-	 * stale copies first.
-	 * ---------------------------------------------
-	 */
-	ldr	x1, =TZDRAM_BASE
-	mov	x0, #AFFMAP_OFF
-	add	x1, x0, x1
-	mov	x2, #PLATFORM_CACHE_LINE_SIZE
-	mul	x2, x2, x20
-	add	x0, x1, x2
-	bl	dcivac
-	str	x19, [x1, x2]
-
 	/* ---------------------------------------------
 	 * Power down this cpu.
 	 * TODO: Do we need to worry about powering the
@@ -206,25 +190,6 @@ platform_cold_boot_init: ; .type platform_cold_boot_init, %function
 	 */
 	bl	platform_set_coherent_stack
 
-	/* ---------------------------------------------
-	 * Mark this cpu as being present. This is a
-	 * SO write. Invalidate any stale copies out of
-	 * paranoia as there is no one else around.
-	 * ---------------------------------------------
-	 */
-	mov	x0, x19
-	bl	platform_get_core_pos
-	mov	x21, x0
-
-	ldr	x1, =TZDRAM_BASE
-	mov	x0, #AFFMAP_OFF
-	add	x1, x0, x1
-	mov	x2, #PLATFORM_CACHE_LINE_SIZE
-	mul	x2, x2, x21
-	add	x0, x1, x2
-	bl	dcivac
-	str	x19, [x1, x2]
-
 	/* ---------------------------------------------
 	 * Architectural init. can be generic e.g.
 	 * enabling stack alignment and platform spec-
diff --git a/plat/fvp/platform.h b/plat/fvp/platform.h
index 6b915a82c..53f14aa40 100644
--- a/plat/fvp/platform.h
+++ b/plat/fvp/platform.h
@@ -127,7 +127,6 @@
 #define TZDRAM_BASE		0x06000000
 #define TZDRAM_SIZE		0x02000000
 #define MBOX_OFF		0x1000
-#define AFFMAP_OFF		0x1200
 
 #define DRAM_BASE              0x80000000ull
 #define DRAM_SIZE              0x80000000ull