andrius
/
arm-trusted-firmware
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

corstone700: clean-up as per coding style guide 

Running checkpatch.pl on the codebase and making required changes

Change-Id: I7d3f8764cef632ab2a6d3c355c68f590440b85b8
Signed-off-by: Avinash Mehta <avinash.mehta@arm.com>
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
This commit is contained in:
Avinash Mehta 2019-07-11 16:23:43 +01:00 committed by Abdellatif El Khlifi
parent c6fe43b726
commit 93cf1f6454
2 changed files with 47 additions and 45 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
plat/arm/board/corstone700/corstone700_topology.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -8,8 +8,8 @@
#include <plat/common/platform.h>
/* The Corstone700 power domain tree descriptor */
static unsigned char corstone700_power_domain_tree_desc
[PLAT_ARM_CLUSTER_COUNT + 2];
static unsigned char corstone700_power_domain_tree_desc[PLAT_ARM_CLUSTER_COUNT
+ 2];
/*******************************************************************************
* This function dynamically constructs the topology according to
* CLUSTER_COUNT and returns it.

14
plat/arm/board/corstone700/include/platform_def.h
View File

@ -17,11 +17,13 @@
#define CORSTONE700_CLUSTER_COUNT U(1)
#define CORSTONE700_MAX_CPUS_PER_CLUSTER U(4)
#define CORSTONE700_MAX_PE_PER_CPU U(1)
#define CORSTONE700_CORE_COUNT (CORSTONE700_CLUSTER_COUNT * \
#define PLAT_ARM_CLUSTER_COUNT CORSTONE700_CLUSTER_COUNT
#define PLATFORM_CORE_COUNT (PLAT_ARM_CLUSTER_COUNT * \
CORSTONE700_MAX_CPUS_PER_CLUSTER * \
CORSTONE700_MAX_PE_PER_CPU)
#define PLATFORM_CORE_COUNT CORSTONE700_CORE_COUNT
#define PLAT_ARM_CLUSTER_COUNT CORSTONE700_CLUSTER_COUNT
/* UART related constants */
#define PLAT_ARM_BOOT_UART_BASE 0x1a510000
@ -222,10 +224,10 @@
*/
#define PLAT_ARM_G1S_IRQ_PROPS(grp) \
ARM_G1S_IRQ_PROPS(grp), \
INTR_PROP_DESC(CORSTONE700_IRQ_TZ_WDOG, \
GIC_HIGHEST_SEC_PRIORITY, (grp), GIC_INTR_CFG_LEVEL), \
INTR_PROP_DESC(CORSTONE700_IRQ_TZ_WDOG, GIC_HIGHEST_SEC_PRIORITY, \
(grp), GIC_INTR_CFG_LEVEL), \
INTR_PROP_DESC(CORSTONE700_IRQ_SEC_SYS_TIMER, \
GIC_HIGHEST_SEC_PRIORITY, (grp), GIC_INTR_CFG_LEVEL) \
GIC_HIGHEST_SEC_PRIORITY, (grp), GIC_INTR_CFG_LEVEL)
#define PLAT_ARM_G0_IRQ_PROPS(grp) ARM_G0_IRQ_PROPS(grp)