From 94a73ef330078b0d7cd1b5433a5a07d5cf976714 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Fri, 18 Dec 2020 17:41:01 +0000 Subject: [PATCH] plat: renesas: rzg: DT memory node enhancements Add DT node support for channel 0 where physical memory is split between 32bit space and 64bit space. Signed-off-by: Biju Das Reviewed-by: Lad Prabhakar Change-Id: I99a18dbb14cdb54100a836c16445242e430794e3 --- plat/renesas/rzg/bl2_plat_setup.c | 72 ++++++++++++++++++++----------- 1 file changed, 48 insertions(+), 24 deletions(-) diff --git a/plat/renesas/rzg/bl2_plat_setup.c b/plat/renesas/rzg/bl2_plat_setup.c index 4b3f38bd2..13f413b55 100644 --- a/plat/renesas/rzg/bl2_plat_setup.c +++ b/plat/renesas/rzg/bl2_plat_setup.c @@ -36,6 +36,12 @@ #include "rom_api.h" #define MAX_DRAM_CHANNELS 4 +/* + * DDR ch0 has a shadow area mapped in 32bit address space. + * Physical address 0x4_0000_0000 - 0x4_7fff_ffff in 64bit space + * is mapped to 0x4000_0000 - 0xbfff_ffff in 32bit space. + */ +#define MAX_DRAM_SIZE_CH0_32BIT_ADDR_SPACE 0x80000000ULL #if RCAR_BL2_DCACHE == 1 /* @@ -447,12 +453,38 @@ static void bl2_populate_compatible_string(void *dt) } } -static void bl2_advertise_dram_entries(uint64_t dram_config[8]) +static int bl2_add_memory_node(uint64_t start, uint64_t size) { char nodename[32] = { 0 }; - uint64_t start, size; uint64_t fdtsize; - int ret, node, chan; + int ret, node; + + fdtsize = cpu_to_fdt64(size); + + snprintf(nodename, sizeof(nodename), "memory@"); + unsigned_num_print(start, 16, nodename + strlen(nodename)); + node = ret = fdt_add_subnode(fdt, 0, nodename); + if (ret < 0) { + return ret; + } + + ret = fdt_setprop_string(fdt, node, "device_type", "memory"); + if (ret < 0) { + return ret; + } + + ret = fdt_setprop_u64(fdt, node, "reg", start); + if (ret < 0) { + return ret; + } + + return fdt_appendprop(fdt, node, "reg", &fdtsize, sizeof(fdtsize)); +} + +static void bl2_advertise_dram_entries(uint64_t dram_config[8]) +{ + uint64_t start, size; + int ret, chan; for (chan = 0; chan < MAX_DRAM_CHANNELS; chan++) { start = dram_config[2 * chan]; @@ -485,31 +517,23 @@ static void bl2_advertise_dram_entries(uint64_t dram_config[8]) * 128 MiB are reserved */ if (chan == 0) { + /* + * Maximum DDR size in Channel 0 for 32 bit space is 2GB, Add DT node + * for remaining region in 64 bit address space + */ + if (size > MAX_DRAM_SIZE_CH0_32BIT_ADDR_SPACE) { + start = dram_config[chan] + MAX_DRAM_SIZE_CH0_32BIT_ADDR_SPACE; + size -= MAX_DRAM_SIZE_CH0_32BIT_ADDR_SPACE; + ret = bl2_add_memory_node(start, size); + if (ret < 0) { + goto err; + } + } start = 0x48000000U; size -= 0x8000000U; } - fdtsize = cpu_to_fdt64(size); - - snprintf(nodename, sizeof(nodename), "memory@"); - unsigned_num_print(start, 16, nodename + strlen(nodename)); - node = ret = fdt_add_subnode(fdt, 0, nodename); - if (ret < 0) { - goto err; - } - - ret = fdt_setprop_string(fdt, node, "device_type", "memory"); - if (ret < 0) { - goto err; - } - - ret = fdt_setprop_u64(fdt, node, "reg", start); - if (ret < 0) { - goto err; - } - - ret = fdt_appendprop(fdt, node, "reg", &fdtsize, - sizeof(fdtsize)); + ret = bl2_add_memory_node(start, size); if (ret < 0) { goto err; }