andrius
/
arm-trusted-firmware
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Merge "Fix topology description of cpus for DynamIQ based FVP" into integration

This commit is contained in:
Mark Dykes 2020-02-14 19:12:44 +00:00 committed by TrustedFirmware Code Review
parent 7b3d0948da 0ad5b318f7
commit 956059385c
4 changed files with 43 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
fdts/fvp-base-gicv3-psci-common.dtsi
View File

@ -39,7 +39,7 @@
#address-cells = <2>;
#size-cells = <0>;
cpu-map {
CPU_MAP:cpu-map {
cluster0 {
core0 {
cpu = <&CPU0>;

2
fdts/fvp-base-gicv3-psci-dynamiq-2t.dts
View File

@ -6,7 +6,7 @@
/dts-v1/;
#include "fvp-base-gicv3-psci-common.dtsi"
#include "fvp-base-gicv3-psci-dynamiq-common.dtsi"
&CPU0 {
reg = <0x0 0x0>;

40
fdts/fvp-base-gicv3-psci-dynamiq-common.dtsi Normal file
View File

@ -0,0 +1,40 @@
/*
* Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/dts-v1/;
#include "fvp-base-gicv3-psci-common.dtsi"
/* DynamIQ based designs have upto 8 CPUs in each cluster */
&CPU_MAP {
cluster0 {
core0 {
cpu = <&CPU0>;
};
core1 {
cpu = <&CPU1>;
};
core2 {
cpu = <&CPU2>;
};
core3 {
cpu = <&CPU3>;
};
core4 {
cpu = <&CPU4>;
};
core5 {
cpu = <&CPU5>;
};
core6 {
cpu = <&CPU6>;
};
core7 {
cpu = <&CPU7>;
};
};
};

2
fdts/fvp-base-gicv3-psci-dynamiq.dts
View File

@ -6,7 +6,7 @@
/dts-v1/;
#include "fvp-base-gicv3-psci-common.dtsi"
#include "fvp-base-gicv3-psci-dynamiq-common.dtsi"
&CPU0 {
reg = <0x0 0x0>;