Tegra: memctrl_v2: MC transaction overrides for newer chips
This patch programs MC transaction overrides settings using mc_txn_override_cfgs array for all Tegra chips beyond Tegra186 rev. A01 Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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@ -375,10 +375,14 @@ void tegra_memctrl_setup(void)
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/*
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/*
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* Set the MC_TXN_OVERRIDE registers for write clients.
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* Set the MC_TXN_OVERRIDE registers for write clients.
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*/
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*/
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if (!tegra_platform_is_silicon() ||
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if ((tegra_get_chipid() == (uint32_t)TEGRA_CHIPID_TEGRA18) &&
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(tegra_platform_is_silicon() && tegra_get_chipid_minor() == 1)) {
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(!tegra_platform_is_silicon() ||
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(tegra_platform_is_silicon() && tegra_get_chipid_minor() == 1))) {
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/* GPU and NVENC settings for rev. A01 */
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/*
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* GPU and NVENC settings for Tegra186 simulation and
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* Silicon rev. A01
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*/
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val = tegra_mc_read_32(MC_TXN_OVERRIDE_CONFIG_GPUSWR);
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val = tegra_mc_read_32(MC_TXN_OVERRIDE_CONFIG_GPUSWR);
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val &= ~MC_TXN_OVERRIDE_CGID_TAG_MASK;
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val &= ~MC_TXN_OVERRIDE_CGID_TAG_MASK;
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tegra_mc_write_32(MC_TXN_OVERRIDE_CONFIG_GPUSWR,
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tegra_mc_write_32(MC_TXN_OVERRIDE_CONFIG_GPUSWR,
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@ -396,7 +400,9 @@ void tegra_memctrl_setup(void)
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} else {
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} else {
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/* settings for rev. A02 */
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/*
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* Settings for Tegra186 silicon rev. A02 and onwards.
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*/
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for (i = 0; i < num_txn_override_cfgs; i++) {
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for (i = 0; i < num_txn_override_cfgs; i++) {
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val = tegra_mc_read_32(mc_txn_override_cfgs[i].offset);
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val = tegra_mc_read_32(mc_txn_override_cfgs[i].offset);
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val &= ~MC_TXN_OVERRIDE_CGID_TAG_MASK;
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val &= ~MC_TXN_OVERRIDE_CGID_TAG_MASK;
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