From 95f68bc4980ea2404fd5b3849b83bb15c08b0a50 Mon Sep 17 00:00:00 2001 From: Krishna Reddy Date: Sun, 17 Dec 2017 16:21:47 -0800 Subject: [PATCH] Tegra194: memctrl: fix bug in client order id reg value generation Client order id reset values are incorrectly and'ed with mc_client_order_id macro, which resulted in getting reg value as always zero. Updated mc_client_order_id macro to avoid and'ing outside the macro, to take the reg value and update specific bit field as necessary. Change-Id: I880be6e4291d7cd58cf70d7c247a4044e57edd9e Signed-off-by: Krishna Reddy --- plat/nvidia/tegra/include/t194/tegra_mc_def.h | 4 ++-- plat/nvidia/tegra/soc/t194/plat_memctrl.c | 11 ++++------- 2 files changed, 6 insertions(+), 9 deletions(-) diff --git a/plat/nvidia/tegra/include/t194/tegra_mc_def.h b/plat/nvidia/tegra/include/t194/tegra_mc_def.h index 86ab85935..55d4fd5c9 100644 --- a/plat/nvidia/tegra/include/t194/tegra_mc_def.h +++ b/plat/nvidia/tegra/include/t194/tegra_mc_def.h @@ -27,8 +27,8 @@ #define MC_CLIENT_ORDER_ID_28_PCIE5W_MASK (0x3U << 12) #define MC_CLIENT_ORDER_ID_28_PCIE5W_ORDER_ID (2U << 12) -#define mc_client_order_id(id, client) \ - (~MC_CLIENT_ORDER_ID_##id##_##client##_MASK | \ +#define mc_client_order_id(val, id, client) \ + ((val & ~MC_CLIENT_ORDER_ID_##id##_##client##_MASK) | \ MC_CLIENT_ORDER_ID_##id##_##client##_ORDER_ID) /******************************************************************************* diff --git a/plat/nvidia/tegra/soc/t194/plat_memctrl.c b/plat/nvidia/tegra/soc/t194/plat_memctrl.c index a59cd11ae..374797c07 100644 --- a/plat/nvidia/tegra/soc/t194/plat_memctrl.c +++ b/plat/nvidia/tegra/soc/t194/plat_memctrl.c @@ -577,17 +577,14 @@ static void tegra194_memctrl_reconfig_mss_clients(void) tegra_mc_write_32(MC_PCFIFO_CLIENT_CONFIG7, reg_val); /* Set Order Id only for the clients having non zero order id */ - reg_val = MC_CLIENT_ORDER_ID_9_RESET_VAL & - mc_client_order_id(9, XUSB_HOSTW); + reg_val = mc_client_order_id(MC_CLIENT_ORDER_ID_9_RESET_VAL, 9, XUSB_HOSTW); tegra_mc_write_32(MC_CLIENT_ORDER_ID_9, reg_val); - reg_val = MC_CLIENT_ORDER_ID_27_RESET_VAL & - mc_client_order_id(27, PCIE0W); + reg_val = mc_client_order_id(MC_CLIENT_ORDER_ID_27_RESET_VAL, 27, PCIE0W); tegra_mc_write_32(MC_CLIENT_ORDER_ID_27, reg_val); - reg_val = MC_CLIENT_ORDER_ID_28_RESET_VAL & - mc_client_order_id(28, PCIE4W) & - mc_client_order_id(28, PCIE5W); + reg_val = mc_client_order_id(MC_CLIENT_ORDER_ID_28_RESET_VAL, 28, PCIE4W); + reg_val = mc_client_order_id(reg_val, 28, PCIE5W); tegra_mc_write_32(MC_CLIENT_ORDER_ID_28, reg_val); /* Set VC Id only for the clients having different reset values */