refactor(plat/nxp/lx216x): clean up platform configure file
Use common code in common file to configure platform. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Change-Id: I72fe22751f12b8a4996a7b9f75fae4c912ea86de
This commit is contained in:
Jiafei Pan
parent
5d5c3ff3f7
commit
9663160d91
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@ -33,59 +33,15 @@ BL2_BIN_XSPI_NOR_END_ADDRESS := 0x100000
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# config is enabled for future use cases.
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FSPI_ERASE_4K := 0
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# Platform specific features.
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# Platform specific features.
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WARM_BOOT := yes
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# Adding platform specific defines
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$(eval $(call add_define_val,BOARD,'"${BOARD}"'))
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ifeq (${POVDD_ENABLE},yes)
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$(eval $(call add_define,CONFIG_POVDD_ENABLE))
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endif
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ifneq (${FLASH_TYPE},)
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$(eval $(call add_define,CONFIG_${FLASH_TYPE}))
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endif
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ifneq (${XSPI_FLASH_SZ},)
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$(eval $(call add_define_val,NXP_FLEXSPI_FLASH_SIZE,${XSPI_FLASH_SZ}))
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endif
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ifneq (${FSPI_ERASE_4K},)
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$(eval $(call add_define_val,CONFIG_FSPI_ERASE_4K,${FSPI_ERASE_4K}))
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endif
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ifneq (${NUM_OF_DDRC},)
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$(eval $(call add_define_val,NUM_OF_DDRC,${NUM_OF_DDRC}))
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endif
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ifneq (${DDRC_NUM_DIMM},)
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$(eval $(call add_define_val,DDRC_NUM_DIMM,${DDRC_NUM_DIMM}))
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endif
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ifneq (${DDRC_NUM_CS},)
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$(eval $(call add_define_val,DDRC_NUM_CS,${DDRC_NUM_CS}))
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endif
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ifeq (${DDR_ADDR_DEC},yes)
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$(eval $(call add_define,CONFIG_DDR_ADDR_DEC))
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endif
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ifeq (${DDR_ECC_EN},yes)
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$(eval $(call add_define,CONFIG_DDR_ECC_EN))
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endif
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# Platform can control the base address for non-volatile storage.
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#$(eval $(call add_define_val,NV_STORAGE_BASE_ADDR,'${BL2_BIN_XSPI_NOR_END_ADDRESS} - 2 * ${NXP_XSPI_NOR_UNIT_SIZE}'))
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ifeq (${WARM_BOOT},yes)
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$(eval $(call add_define_val,PHY_TRAINING_REGS_ON_FLASH,'${BL2_BIN_XSPI_NOR_END_ADDRESS} - ${NXP_XSPI_NOR_UNIT_SIZE}'))
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endif
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# Adding Platform files build files
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# Adding Platform files build files
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BL2_SOURCES += ${BOARD_PATH}/ddr_init.c\
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${BOARD_PATH}/platform.c
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# Adding SoC build info
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# Adding platform board build info
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include plat/nxp/common/plat_make_helper/plat_common_def.mk
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# Adding SoC build info
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include plat/nxp/soc-lx2160a/soc.mk
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@ -36,56 +36,12 @@ FSPI_ERASE_4K := 0
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# Platform specific features.
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WARM_BOOT := no
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# Adding platform specific defines
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$(eval $(call add_define_val,BOARD,'"${BOARD}"'))
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ifeq (${POVDD_ENABLE},yes)
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$(eval $(call add_define,CONFIG_POVDD_ENABLE))
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endif
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ifneq (${FLASH_TYPE},)
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$(eval $(call add_define,CONFIG_${FLASH_TYPE}))
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endif
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ifneq (${XSPI_FLASH_SZ},)
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$(eval $(call add_define_val,NXP_FLEXSPI_FLASH_SIZE,${XSPI_FLASH_SZ}))
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endif
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ifneq (${FSPI_ERASE_4K},)
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$(eval $(call add_define_val,CONFIG_FSPI_ERASE_4K,${FSPI_ERASE_4K}))
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endif
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ifneq (${NUM_OF_DDRC},)
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$(eval $(call add_define_val,NUM_OF_DDRC,${NUM_OF_DDRC}))
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endif
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ifneq (${DDRC_NUM_DIMM},)
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$(eval $(call add_define_val,DDRC_NUM_DIMM,${DDRC_NUM_DIMM}))
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endif
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ifneq (${DDRC_NUM_CS},)
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$(eval $(call add_define_val,DDRC_NUM_CS,${DDRC_NUM_CS}))
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endif
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ifeq (${DDR_ADDR_DEC},yes)
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$(eval $(call add_define,CONFIG_DDR_ADDR_DEC))
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endif
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ifeq (${DDR_ECC_EN},yes)
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$(eval $(call add_define,CONFIG_DDR_ECC_EN))
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endif
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# Platform can control the base address for non-volatile storage.
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#$(eval $(call add_define_val,NV_STORAGE_BASE_ADDR,'${BL2_BIN_XSPI_NOR_END_ADDRESS} - 2 * ${NXP_XSPI_NOR_UNIT_SIZE}'))
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ifeq (${WARM_BOOT},yes)
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$(eval $(call add_define_val,PHY_TRAINING_REGS_ON_FLASH,'${BL2_BIN_XSPI_NOR_END_ADDRESS} - ${NXP_XSPI_NOR_UNIT_SIZE}'))
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endif
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# Adding Platform files build files
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BL2_SOURCES += ${BOARD_PATH}/ddr_init.c\
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${BOARD_PATH}/platform.c
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# Adding platform board build info
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include plat/nxp/common/plat_make_helper/plat_common_def.mk
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# Adding SoC build info
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include plat/nxp/soc-lx2160a/soc.mk
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@ -25,7 +25,7 @@ ERRATA_DDR_A011396 := 1
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ERRATA_DDR_A050450 := 1
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# On-Board Flash Details
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# On-Board Flash Details
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FLASH_TYPE := MT35XU512A
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XSPI_FLASH_SZ := 0x10000000
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NXP_XSPI_NOR_UNIT_SIZE := 0x20000
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@ -34,59 +34,15 @@ BL2_BIN_XSPI_NOR_END_ADDRESS := 0x100000
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# config is enabled for future use cases.
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FSPI_ERASE_4K := 0
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# Platform specific features.
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# Platform specific features.
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WARM_BOOT := yes
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# Adding platform specific defines
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$(eval $(call add_define_val,BOARD,'"${BOARD}"'))
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ifeq (${POVDD_ENABLE},yes)
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$(eval $(call add_define,CONFIG_POVDD_ENABLE))
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endif
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ifneq (${FLASH_TYPE},)
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$(eval $(call add_define,CONFIG_${FLASH_TYPE}))
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endif
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ifneq (${XSPI_FLASH_SZ},)
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$(eval $(call add_define_val,NXP_FLEXSPI_FLASH_SIZE,${XSPI_FLASH_SZ}))
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endif
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ifneq (${FSPI_ERASE_4K},)
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$(eval $(call add_define_val,CONFIG_FSPI_ERASE_4K,${FSPI_ERASE_4K}))
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endif
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ifneq (${NUM_OF_DDRC},)
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$(eval $(call add_define_val,NUM_OF_DDRC,${NUM_OF_DDRC}))
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endif
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ifneq (${DDRC_NUM_DIMM},)
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$(eval $(call add_define_val,DDRC_NUM_DIMM,${DDRC_NUM_DIMM}))
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endif
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ifneq (${DDRC_NUM_CS},)
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$(eval $(call add_define_val,DDRC_NUM_CS,${DDRC_NUM_CS}))
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endif
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ifeq (${DDR_ADDR_DEC},yes)
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$(eval $(call add_define,CONFIG_DDR_ADDR_DEC))
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endif
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ifeq (${DDR_ECC_EN},yes)
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$(eval $(call add_define,CONFIG_DDR_ECC_EN))
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endif
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# Platform can control the base address for non-volatile storage.
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#$(eval $(call add_define_val,NV_STORAGE_BASE_ADDR,'${BL2_BIN_XSPI_NOR_END_ADDRESS} - 2 * ${NXP_XSPI_NOR_UNIT_SIZE}'))
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ifeq (${WARM_BOOT},yes)
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$(eval $(call add_define_val,PHY_TRAINING_REGS_ON_FLASH,'${BL2_BIN_XSPI_NOR_END_ADDRESS} - ${NXP_XSPI_NOR_UNIT_SIZE}'))
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endif
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# Adding Platform files build files
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# Adding Platform files build files
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BL2_SOURCES += ${BOARD_PATH}/ddr_init.c\
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${BOARD_PATH}/platform.c
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# Adding SoC build info
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# Adding platform board build info
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include plat/nxp/common/plat_make_helper/plat_common_def.mk
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# Adding SoC build info
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include plat/nxp/soc-lx2160a/soc.mk
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