Tegra186: remove support for Quasi System power off (SC8) state
This patch removes support for the SC8 power state as the feature is no longer required for Tegra186 projects. Change-Id: I622a5ddcffe025b9b798801d09bbb856853befd7 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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@ -45,9 +45,6 @@ static struct t18x_psci_percpu_data {
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unsigned int wake_time;
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unsigned int wake_time;
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} __aligned(CACHE_WRITEBACK_GRANULE) percpu_data[PLATFORM_CORE_COUNT];
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} __aligned(CACHE_WRITEBACK_GRANULE) percpu_data[PLATFORM_CORE_COUNT];
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/* System power down state */
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uint32_t tegra186_system_powerdn_state = TEGRA_ARI_MISC_CCPLEX_SHUTDOWN_POWER_OFF;
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int32_t tegra_soc_validate_power_state(unsigned int power_state,
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int32_t tegra_soc_validate_power_state(unsigned int power_state,
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psci_power_state_t *req_state)
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psci_power_state_t *req_state)
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{
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{
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@ -362,48 +359,8 @@ int tegra_soc_pwr_domain_off(const psci_power_state_t *target_state)
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__dead2 void tegra_soc_prepare_system_off(void)
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__dead2 void tegra_soc_prepare_system_off(void)
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{
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{
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mce_cstate_info_t cstate_info = { 0 };
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/* power off the entire system */
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uint32_t val;
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mce_enter_ccplex_state(TEGRA_ARI_MISC_CCPLEX_SHUTDOWN_POWER_OFF);
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if (tegra186_system_powerdn_state == TEGRA_ARI_MISC_CCPLEX_SHUTDOWN_POWER_OFF) {
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/* power off the entire system */
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mce_enter_ccplex_state(tegra186_system_powerdn_state);
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} else if (tegra186_system_powerdn_state == TEGRA_ARI_SYSTEM_SC8) {
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/* Prepare for quasi power down */
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cstate_info.cluster = TEGRA_ARI_CLUSTER_CC7;
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cstate_info.system = TEGRA_ARI_SYSTEM_SC8;
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cstate_info.system_state_force = 1;
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cstate_info.update_wake_mask = 1;
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mce_update_cstate_info(&cstate_info);
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/* loop until other CPUs power down */
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do {
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val = mce_command_handler(MCE_CMD_IS_SC7_ALLOWED,
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TEGRA_ARI_CORE_C7,
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MCE_CORE_SLEEP_TIME_INFINITE,
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0);
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} while (val == 0);
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/* Enter quasi power down state */
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(void)mce_command_handler(MCE_CMD_ENTER_CSTATE,
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TEGRA_ARI_CORE_C7, MCE_CORE_SLEEP_TIME_INFINITE, 0);
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/* disable GICC */
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tegra_gic_cpuif_deactivate();
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/* power down core */
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prepare_cpu_pwr_dwn();
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/* flush L1/L2 data caches */
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dcsw_op_all(DCCISW);
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} else {
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ERROR("%s: unsupported power down state (%d)\n", __func__,
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tegra186_system_powerdn_state);
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}
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wfi();
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wfi();
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@ -20,8 +20,6 @@
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#include <t18x_ari.h>
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#include <t18x_ari.h>
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#include <tegra_private.h>
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#include <tegra_private.h>
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extern uint32_t tegra186_system_powerdn_state;
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/*******************************************************************************
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/*******************************************************************************
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* Offset to read the ref_clk counter value
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* Offset to read the ref_clk counter value
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******************************************************************************/
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******************************************************************************/
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@ -30,7 +28,6 @@ extern uint32_t tegra186_system_powerdn_state;
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/*******************************************************************************
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/*******************************************************************************
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* Tegra186 SiP SMCs
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* Tegra186 SiP SMCs
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******************************************************************************/
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******************************************************************************/
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#define TEGRA_SIP_SYSTEM_SHUTDOWN_STATE 0xC2FFFE01
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#define TEGRA_SIP_GET_ACTMON_CLK_COUNTERS 0xC2FFFE02
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#define TEGRA_SIP_GET_ACTMON_CLK_COUNTERS 0xC2FFFE02
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#define TEGRA_SIP_MCE_CMD_ENTER_CSTATE 0xC2FFFF00
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#define TEGRA_SIP_MCE_CMD_ENTER_CSTATE 0xC2FFFF00
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#define TEGRA_SIP_MCE_CMD_UPDATE_CSTATE_INFO 0xC2FFFF01
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#define TEGRA_SIP_MCE_CMD_UPDATE_CSTATE_INFO 0xC2FFFF01
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@ -115,33 +112,6 @@ int plat_sip_handler(uint32_t smc_fid,
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return 0;
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return 0;
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case TEGRA_SIP_SYSTEM_SHUTDOWN_STATE:
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/* clean up the high bits */
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x1 = (uint32_t)x1;
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/*
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* SC8 is a special Tegra186 system state where the CPUs and
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* DRAM are powered down but the other subsystem is still
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* alive.
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*/
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if ((x1 == TEGRA_ARI_SYSTEM_SC8) ||
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(x1 == TEGRA_ARI_MISC_CCPLEX_SHUTDOWN_POWER_OFF)) {
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tegra186_system_powerdn_state = x1;
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flush_dcache_range(
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(uintptr_t)&tegra186_system_powerdn_state,
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sizeof(tegra186_system_powerdn_state));
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} else {
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ERROR("%s: unhandled powerdn state (%d)\n", __func__,
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(uint32_t)x1);
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return -ENOTSUP;
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}
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return 0;
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/*
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/*
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* This function ID reads the Activity monitor's core/ref clock
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* This function ID reads the Activity monitor's core/ref clock
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* counter values for a core/cluster.
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* counter values for a core/cluster.
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