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plat: xilinx: zynqmp: Move zynqmp_def.h to include directory 

Move zynqmp_def.h to platform specific include directory.
Also, update source file to include header file from updated
path of zynqmp_def.h

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Reviewed-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
This commit is contained in:
Jolly Shah 2019-01-08 11:16:16 -08:00
parent 31c3842ee8
commit 99564393bf
5 changed files with 21 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
plat/xilinx/zynqmp/include/plat_macros.S
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -8,7 +8,7 @@
#include <arm_macros.S>
#include <cci_macros.S>
#include "../zynqmp_def.h"
#include "zynqmp_def.h"
/* ---------------------------------------------
* The below required platform porting macro

2
plat/xilinx/zynqmp/include/platform_def.h
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@ -12,7 +12,7 @@
#include <drivers/arm/gic_common.h>
#include <lib/utils_def.h>
#include "../zynqmp_def.h"
#include "zynqmp_def.h"
/*******************************************************************************
* Generic platform constants

23
plat/xilinx/zynqmp/zynqmp_def.h → plat/xilinx/zynqmp/include/zynqmp_def.h
View File

@ -60,8 +60,10 @@
#define CRL_APB_BOOT_PIN_MASK (U(0xf0f) << 0)
#define CRL_APB_BOOT_DRIVE_PIN_1_SHIFT U(9)
#define CRL_APB_BOOT_ENABLE_PIN_1_SHIFT U(1)
#define CRL_APB_BOOT_ENABLE_PIN_1 (U(0x1) << CRL_APB_BOOT_ENABLE_PIN_1_SHIFT)
#define CRL_APB_BOOT_DRIVE_PIN_1 (U(0x1) << CRL_APB_BOOT_DRIVE_PIN_1_SHIFT)
#define CRL_APB_BOOT_ENABLE_PIN_1 (U(0x1) << \
CRL_APB_BOOT_ENABLE_PIN_1_SHIFT)
#define CRL_APB_BOOT_DRIVE_PIN_1 (U(0x1) << \
CRL_APB_BOOT_DRIVE_PIN_1_SHIFT)
#define ZYNQMP_BOOTMODE_JTAG U(0)
#define ZYNQMP_ULPI_RESET_VAL_HIGH (CRL_APB_BOOT_ENABLE_PIN_1 | \
CRL_APB_BOOT_DRIVE_PIN_1)
@ -137,7 +139,7 @@
#define ZYNQMP_UART0_BASE 0xFF000000
#define ZYNQMP_UART1_BASE 0xFF010000
#if ZYNQMP_CONSOLE_IS(cadence)
#if ZYNQMP_CONSOLE_IS(cadence) || ZYNQMP_CONSOLE_IS(dcc)
# define ZYNQMP_UART_BASE ZYNQMP_UART0_BASE
#elif ZYNQMP_CONSOLE_IS(cadence1)
# define ZYNQMP_UART_BASE ZYNQMP_UART1_BASE
@ -167,22 +169,27 @@
#define ZYNQMP_CSU_IDCODE_OFFSET 0x40
#define ZYNQMP_CSU_IDCODE_XILINX_ID_SHIFT 0
#define ZYNQMP_CSU_IDCODE_XILINX_ID_MASK (0xFFF << ZYNQMP_CSU_IDCODE_XILINX_ID_SHIFT)
#define ZYNQMP_CSU_IDCODE_XILINX_ID_MASK (0xFFF << \
ZYNQMP_CSU_IDCODE_XILINX_ID_SHIFT)
#define ZYNQMP_CSU_IDCODE_XILINX_ID 0x093
#define ZYNQMP_CSU_IDCODE_SVD_SHIFT 12
#define ZYNQMP_CSU_IDCODE_SVD_MASK (0x7 << \
ZYNQMP_CSU_IDCODE_SVD_SHIFT)
#define ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT 15
#define ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK (0xF << ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT)
#define ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK (0xF << \
ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT)
#define ZYNQMP_CSU_IDCODE_SUB_FAMILY_SHIFT 19
#define ZYNQMP_CSU_IDCODE_SUB_FAMILY_MASK (0x3 << ZYNQMP_CSU_IDCODE_SUB_FAMILY_SHIFT)
#define ZYNQMP_CSU_IDCODE_SUB_FAMILY_MASK (0x3 << \
ZYNQMP_CSU_IDCODE_SUB_FAMILY_SHIFT)
#define ZYNQMP_CSU_IDCODE_FAMILY_SHIFT 21
#define ZYNQMP_CSU_IDCODE_FAMILY_MASK (0x7F << ZYNQMP_CSU_IDCODE_FAMILY_SHIFT)
#define ZYNQMP_CSU_IDCODE_FAMILY_MASK (0x7F << \
ZYNQMP_CSU_IDCODE_FAMILY_SHIFT)
#define ZYNQMP_CSU_IDCODE_FAMILY 0x23
#define ZYNQMP_CSU_IDCODE_REVISION_SHIFT 28
#define ZYNQMP_CSU_IDCODE_REVISION_MASK (0xF << ZYNQMP_CSU_IDCODE_REVISION_SHIFT)
#define ZYNQMP_CSU_IDCODE_REVISION_MASK (0xF << \
ZYNQMP_CSU_IDCODE_REVISION_SHIFT)
#define ZYNQMP_CSU_IDCODE_REVISION 0
#define ZYNQMP_CSU_VERSION_OFFSET 0x44

2
plat/xilinx/zynqmp/pm_service/pm_api_ioctl.c
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@ -12,6 +12,7 @@
#include <drivers/delay_timer.h>
#include <lib/mmio.h>
#include <plat/common/platform.h>
#include <zynqmp_def.h>
#include "pm_api_clock.h"
#include "pm_api_ioctl.h"
@ -19,7 +20,6 @@
#include "pm_client.h"
#include "pm_common.h"
#include "pm_ipi.h"
#include "../zynqmp_def.h"
/**
* pm_ioctl_get_rpu_oper_mode () - Get current RPU operation mode

4
plat/xilinx/zynqmp/pm_service/pm_client.c
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -19,7 +19,7 @@
#include <lib/mmio.h>
#include <lib/utils.h>
#include "../zynqmp_def.h"
#include <zynqmp_def.h>
#include "pm_api_sys.h"
#include "pm_client.h"
#include "pm_ipi.h"