From 99605fb1166794db1dedf1b7280cb184945c229c Mon Sep 17 00:00:00 2001 From: Yann Gautier Date: Tue, 17 May 2022 16:21:25 +0200 Subject: [PATCH] fix(stm32mp1-fdts): correct memory mapping for STM32MP13 On STM32MP13, OP-TEE will be loaded at the beginning of the secure memory, and will be responsible for its shared memory. The memory allocated to OP-TEE is then 32MB, and the shared memory does no more appear in the STM32MP13 fw-config DT file. Signed-off-by: Yann Gautier Change-Id: I4e9238ddb4d82079b9ddf8fc8f6916b5b989d263 --- fdts/stm32mp13-fw-config.dtsi | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/fdts/stm32mp13-fw-config.dtsi b/fdts/stm32mp13-fw-config.dtsi index dc8ca1b43..28f7086c3 100644 --- a/fdts/stm32mp13-fw-config.dtsi +++ b/fdts/stm32mp13-fw-config.dtsi @@ -13,11 +13,9 @@ #endif #define DDR_NS_BASE STM32MP_DDR_BASE -#define DDR_SEC_SIZE 0x01e00000 +#define DDR_SEC_SIZE 0x02000000 #define DDR_SEC_BASE (STM32MP_DDR_BASE + (DDR_SIZE - DDR_SEC_SIZE)) -#define DDR_SHARE_SIZE 0x00200000 -#define DDR_SHARE_BASE (DDR_SEC_BASE - DDR_SHARE_SIZE) -#define DDR_NS_SIZE (DDR_SHARE_BASE - DDR_NS_BASE) +#define DDR_NS_SIZE (DDR_SEC_BASE - DDR_NS_BASE) /dts-v1/; @@ -48,8 +46,6 @@ compatible = "st,mem-firewall"; memory-ranges = < DDR_NS_BASE DDR_NS_SIZE TZC_REGION_S_NONE TZC_REGION_NSEC_ALL_ACCESS_RDWR - DDR_SHARE_BASE DDR_SHARE_SIZE TZC_REGION_S_NONE - TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_A7_ID) DDR_SEC_BASE DDR_SEC_SIZE TZC_REGION_S_RDWR 0>; }; };