intel: Add bridge control for FPGA reconfig
This is to make sure that bridge access in disabled before doing full FPGA reconfiguration and turn re-enable it once the configuration succeed. Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I1f42fbf04ac1625048bbdf21b8a0443464ed833d
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@ -60,6 +60,7 @@ BL31_SOURCES += \
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plat/intel/soc/common/socfpga_sip_svc.c \
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plat/intel/soc/common/socfpga_topology.c \
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plat/intel/soc/common/soc/socfpga_mailbox.c \
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plat/intel/soc/common/soc/socfpga_reset_manager.c
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PROGRAMMABLE_RESET_ADDRESS := 0
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BL2_AT_EL3 := 1
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@ -11,6 +11,7 @@
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#include <tools_share/uuid.h>
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#include "socfpga_mailbox.h"
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#include "socfpga_reset_manager.h"
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#include "socfpga_sip_svc.h"
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/* Number of SiP Calls implemented */
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@ -27,6 +28,7 @@ static int rcv_id;
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static int max_blocks;
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static uint32_t bytes_per_block;
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static uint32_t blocks_submitted;
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static int is_partial_reconfig;
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struct fpga_config_info {
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uint32_t addr;
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@ -109,6 +111,12 @@ static uint32_t intel_mailbox_fpga_config_isdone(uint32_t query_type)
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return INTEL_SIP_SMC_STATUS_ERROR;
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}
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if (query_type != 1) {
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/* full reconfiguration */
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if (!is_partial_reconfig)
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socfpga_bridges_enable(); /* Enable bridge */
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}
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return INTEL_SIP_SMC_STATUS_OK;
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}
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@ -196,6 +204,8 @@ static int intel_fpga_config_start(uint32_t config_type)
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uint32_t response[3];
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int status = 0;
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is_partial_reconfig = config_type;
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mailbox_clear_response();
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mailbox_send_cmd(1, MBOX_CMD_CANCEL, 0, 0, 0, NULL, 0);
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@ -225,6 +235,12 @@ static int intel_fpga_config_start(uint32_t config_type)
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send_id = 0;
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rcv_id = 0;
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/* full reconfiguration */
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if (!is_partial_reconfig) {
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/* Disable bridge */
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socfpga_bridges_disable();
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}
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return 0;
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}
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@ -59,6 +59,7 @@ BL31_SOURCES += \
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plat/intel/soc/common/socfpga_sip_svc.c \
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plat/intel/soc/common/socfpga_topology.c \
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plat/intel/soc/common/soc/socfpga_mailbox.c \
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plat/intel/soc/common/soc/socfpga_reset_manager.c
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PROGRAMMABLE_RESET_ADDRESS := 0
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BL2_AT_EL3 := 1
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