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Merge changes from topic "fpga_cmdline" into integration 

* changes:
  arm_fpga: Predefine DTB and BL33 load addresses
  arm_fpga: Add Klein and Matterhorn support
  arm_fpga: Support more CPU clusters
This commit is contained in:
André Przywara 2020-07-15 22:07:00 +00:00 committed by TrustedFirmware Code Review
parent 8d5db315d3 c5346ed5e5
commit 9d8028e9d1
2 changed files with 7 additions and 9 deletions
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2
plat/arm/board/arm_fpga/fpga_def.h
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@ -18,7 +18,7 @@
* that are present will still be indexed appropriately regardless of any empty
* entries in the array used to represent the topology.
*/
#define FPGA_MAX_CLUSTER_COUNT 2
#define FPGA_MAX_CLUSTER_COUNT 4
#define FPGA_MAX_CPUS_PER_CLUSTER 8
#define FPGA_MAX_PE_PER_CPU 4

14
plat/arm/board/arm_fpga/platform.mk
View File

@ -24,15 +24,10 @@ ifeq (${TRUSTED_BOARD_BOOT}, 1)
$(error "TRUSTED_BOARD_BOOT must be disabled")
endif
ifndef PRELOADED_BL33_BASE
$(error "PRELOADED_BL33_BASE is not set")
endif
PRELOADED_BL33_BASE := 0x80080000
ifndef FPGA_PRELOADED_DTB_BASE
$(error "FPGA_PRELOADED_DTB_BASE is not set")
else
FPGA_PRELOADED_DTB_BASE := 0x80070000
$(eval $(call add_define,FPGA_PRELOADED_DTB_BASE))
endif
# Treating this as a memory-constrained port for now
USE_COHERENT_MEM := 0
@ -64,7 +59,10 @@ else
lib/cpus/aarch64/neoverse_zeus.S \
lib/cpus/aarch64/cortex_hercules_ae.S \
lib/cpus/aarch64/cortex_a65.S \
lib/cpus/aarch64/cortex_a65ae.S
lib/cpus/aarch64/cortex_a65ae.S \
lib/cpus/aarch64/cortex_klein.S \
lib/cpus/aarch64/cortex_matterhorn.S
# AArch64/AArch32 cores
FPGA_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \
lib/cpus/aarch64/cortex_a75.S