intel: mailbox: Fix non-MISRA compliant code
This patch is used to fix remaining non compliant code for Intel SocFPGA's mailbox driver. These changes include: - adding integer literal for unsigned constant - fix non-boolean controlling expression - add braces even on conditional single statement bodies Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I0f8fd96a3540f35ee102fd2f2369b76fa73e39e1
This commit is contained in:
Abdul Halim, Muhammad Hadi Asyrafi
parent
997560470a
commit
9e285909ae
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@ -54,7 +54,7 @@ static int write_mailbox_cmd_buffer(uint32_t *cin, uint32_t cout,
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if (is_mailbox_cmdbuf_full(*cin)) {
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if (!(*is_doorbell_triggered)) {
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mmio_write_32(MBOX_OFFSET +
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MBOX_DOORBELL_TO_SDM, 1);
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MBOX_DOORBELL_TO_SDM, 1U);
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*is_doorbell_triggered = true;
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}
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mdelay(10U);
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@ -108,7 +108,7 @@ static int fill_mailbox_circular_buffer(uint32_t header_cmd, uint32_t *args,
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}
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if (!is_doorbell_triggered) {
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mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_TO_SDM, 1);
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mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_TO_SDM, 1U);
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}
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return MBOX_RET_OK;
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@ -137,8 +137,9 @@ int mailbox_read_response(uint32_t *job_id, uint32_t *response, int resp_len)
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int resp_data = 0;
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int ret_resp_len;
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if (mmio_read_32(MBOX_OFFSET + MBOX_DOORBELL_FROM_SDM))
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mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_FROM_SDM, 0);
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if (mmio_read_32(MBOX_OFFSET + MBOX_DOORBELL_FROM_SDM) == 1U) {
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mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_FROM_SDM, 0U);
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}
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rin = mmio_read_32(MBOX_OFFSET + MBOX_RIN);
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rout = mmio_read_32(MBOX_OFFSET + MBOX_ROUT);
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@ -189,7 +190,7 @@ int mailbox_poll_response(uint32_t job_id, int urgent, uint32_t *response,
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do {
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if (mmio_read_32(MBOX_OFFSET + MBOX_DOORBELL_FROM_SDM)
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& 1) {
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== 1U) {
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break;
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}
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mdelay(10U);
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@ -199,18 +200,18 @@ int mailbox_poll_response(uint32_t job_id, int urgent, uint32_t *response,
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break;
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}
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mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_FROM_SDM, 0);
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mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_FROM_SDM, 0U);
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if (urgent & 1) {
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mdelay(5);
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if ((urgent & 1) != 0) {
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mdelay(5U);
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if ((mmio_read_32(MBOX_OFFSET + MBOX_STATUS) &
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MBOX_STATUS_UA_MASK) ^
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(urgent & MBOX_STATUS_UA_MASK)) {
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mmio_write_32(MBOX_OFFSET + MBOX_URG, 0);
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mmio_write_32(MBOX_OFFSET + MBOX_URG, 0U);
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return MBOX_RET_OK;
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}
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mmio_write_32(MBOX_OFFSET + MBOX_URG, 0);
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mmio_write_32(MBOX_OFFSET + MBOX_URG, 0U);
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INFO("Error: Mailbox did not get UA");
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return MBOX_RET_ERROR;
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}
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@ -226,8 +227,9 @@ int mailbox_poll_response(uint32_t job_id, int urgent, uint32_t *response,
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mmio_write_32(MBOX_OFFSET + MBOX_ROUT, rout);
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if (MBOX_RESP_CLIENT_ID(resp_data) != MBOX_ATF_CLIENT_ID
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|| MBOX_RESP_JOB_ID(resp_data) != job_id)
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|| MBOX_RESP_JOB_ID(resp_data) != job_id) {
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continue;
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}
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ret_resp_len = MBOX_RESP_LEN(resp_data);
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@ -308,7 +310,7 @@ int mailbox_send_cmd_async(uint32_t *job_id, unsigned int cmd, uint32_t *args,
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return status;
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}
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*job_id = (*job_id + 1) % MBOX_MAX_IND_JOB_ID;
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*job_id = (*job_id + 1U) % MBOX_MAX_IND_JOB_ID;
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return MBOX_RET_OK;
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}
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@ -318,11 +320,11 @@ int mailbox_send_cmd(uint32_t job_id, unsigned int cmd, uint32_t *args,
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{
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int status = 0;
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if (urgent) {
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if (urgent != 0) {
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urgent |= mmio_read_32(MBOX_OFFSET + MBOX_STATUS) &
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MBOX_STATUS_UA_MASK;
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mmio_write_32(MBOX_OFFSET + MBOX_URG, cmd);
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mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_TO_SDM, 1);
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mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_TO_SDM, 1U);
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}
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else {
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@ -333,8 +335,9 @@ int mailbox_send_cmd(uint32_t job_id, unsigned int cmd, uint32_t *args,
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cmd, args, len);
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}
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if (status)
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if (status != 0) {
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return status;
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}
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status = mailbox_poll_response(job_id, urgent, response, resp_len);
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@ -375,12 +378,12 @@ void mailbox_set_qspi_close(void)
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CMD_CASUAL, NULL, 0);
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}
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void mailbox_qspi_set_cs(int device_select)
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void mailbox_qspi_set_cs(uint32_t device_select)
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{
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uint32_t cs_setting = device_select;
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uint32_t cs_setting;
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/* QSPI device select settings at 31:28 */
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cs_setting = (cs_setting << 28);
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cs_setting = (device_select << 28);
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mailbox_set_int(MBOX_INT_FLAG_COE | MBOX_INT_FLAG_RIE);
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mailbox_send_cmd(MBOX_JOB_ID, MBOX_CMD_QSPI_SET_CS, &cs_setting,
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1, CMD_CASUAL, NULL, 0);
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@ -415,18 +418,21 @@ int mailbox_rsu_status(uint32_t *resp_buf, uint32_t resp_buf_len)
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int ret;
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struct rsu_status_info *info = (struct rsu_status_info *)resp_buf;
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info->retry_counter = ~0;
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info->retry_counter = ~0U;
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ret = mailbox_send_cmd(MBOX_JOB_ID, MBOX_RSU_STATUS, NULL, 0,
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CMD_CASUAL, (uint32_t *)resp_buf,
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resp_buf_len);
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if (ret < 0)
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if (ret < 0) {
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return ret;
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}
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if (info->retry_counter != ~0)
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if (!(info->version & RSU_VERSION_ACMF_MASK))
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if (info->retry_counter != ~0U) {
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if ((info->version & RSU_VERSION_ACMF_MASK) == 0U) {
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info->version |= RSU_VERSION_ACMF;
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}
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}
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return ret;
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}
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@ -451,14 +457,15 @@ int mailbox_init(void)
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mailbox_set_int(MBOX_INT_FLAG_COE | MBOX_INT_FLAG_RIE |
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MBOX_INT_FLAG_UAE);
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mmio_write_32(MBOX_OFFSET + MBOX_URG, 0);
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mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_FROM_SDM, 0);
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mmio_write_32(MBOX_OFFSET + MBOX_URG, 0U);
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mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_FROM_SDM, 0U);
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status = mailbox_send_cmd(0, MBOX_CMD_RESTART, NULL, 0,
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status = mailbox_send_cmd(0U, MBOX_CMD_RESTART, NULL, 0,
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CMD_URGENT, NULL, 0);
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if (status)
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if (status != 0) {
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return status;
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}
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mailbox_set_int(MBOX_INT_FLAG_COE | MBOX_INT_FLAG_RIE |
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MBOX_INT_FLAG_UAE);
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@ -474,24 +481,29 @@ int intel_mailbox_get_config_status(uint32_t cmd)
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status = mailbox_send_cmd(MBOX_JOB_ID, cmd, NULL, 0, CMD_CASUAL, response,
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ARRAY_SIZE(response));
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if (status < 0)
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if (status < 0) {
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return status;
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}
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res = response[RECONFIG_STATUS_STATE];
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if (res && res != MBOX_CFGSTAT_STATE_CONFIG)
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if ((res != 0U) && (res != MBOX_CFGSTAT_STATE_CONFIG)) {
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return res;
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}
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res = response[RECONFIG_STATUS_PIN_STATUS];
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if (!(res & PIN_STATUS_NSTATUS))
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if ((res & PIN_STATUS_NSTATUS) == 0U) {
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return MBOX_CFGSTAT_STATE_ERROR_HARDWARE;
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}
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res = response[RECONFIG_STATUS_SOFTFUNC_STATUS];
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if (res & SOFTFUNC_STATUS_SEU_ERROR)
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if ((res & SOFTFUNC_STATUS_SEU_ERROR) != 0U) {
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return MBOX_CFGSTAT_STATE_ERROR_HARDWARE;
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}
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if ((res & SOFTFUNC_STATUS_CONF_DONE) &&
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(res & SOFTFUNC_STATUS_INIT_DONE))
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if ((res & SOFTFUNC_STATUS_CONF_DONE) != 0U &&
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(res & SOFTFUNC_STATUS_INIT_DONE) != 0U) {
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return MBOX_RET_OK;
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}
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return MBOX_CFGSTAT_STATE_CONFIG;
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}
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@ -500,8 +512,9 @@ int intel_mailbox_is_fpga_not_ready(void)
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{
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int ret = intel_mailbox_get_config_status(MBOX_RECONFIG_STATUS);
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if (ret && ret != MBOX_CFGSTAT_STATE_CONFIG)
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if ((ret != MBOX_RET_OK) && (ret != MBOX_CFGSTAT_STATE_CONFIG)) {
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ret = intel_mailbox_get_config_status(MBOX_CONFIG_STATUS);
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}
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return ret;
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}
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