doc: Update change log for v2.1
Change-Id: Ib6a20ffdddad11b9629d7dca7f841182299bf860 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
This commit is contained in:
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.. contents::
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Trusted Firmware-A - version 2.1
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================================
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New Features
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------------
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- Architecture
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- Support for ARMv8.3 pointer authentication in the normal and secure worlds
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The use of pointer authentication in the normal world is enabled whenever
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architectural support is available, without the need for additional build
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flags.
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Use of pointer authentication in the secure world remains an
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experimental configuration at this time. Using both the ``ENABLE_PAUTH``
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and ``CTX_INCLUDE_PAUTH_REGS`` build flags, pointer authentication can be
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enabled in EL3 and S-EL1/0.
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See the `Firmware Design`_ document for additional details on the use of
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pointer authentication.
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- Enable Data Independent Timing (DIT) in EL3, where supported
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- Build System
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- Support for BL-specific build flags
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- Support setting compiler target architecture based on ``ARM_ARCH_MINOR``
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build option.
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- New ``RECLAIM_INIT_CODE`` build flag:
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A significant amount of the code used for the initialization of BL31 is
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not needed again after boot time. In order to reduce the runtime memory
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footprint, the memory used for this code can be reclaimed after
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initialization.
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Certain boot-time functions were marked with the ``__init`` attribute to
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enable this reclamation.
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- CPU Support
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- cortex-a76: Workaround for erratum 1073348
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- cortex-a76: Workaround for erratum 1220197
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- cortex-a76: Workaround for erratum 1130799
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- cortex-a75: Workaround for erratum 790748
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- cortex-a75: Workaround for erratum 764081
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- cortex-a73: Workaround for erratum 852427
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- cortex-a73: Workaround for erratum 855423
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- cortex-a57: Workaround for erratum 817169
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- cortex-a57: Workaround for erratum 814670
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- cortex-a55: Workaround for erratum 903758
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- cortex-a55: Workaround for erratum 846532
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- cortex-a55: Workaround for erratum 798797
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- cortex-a55: Workaround for erratum 778703
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- cortex-a55: Workaround for erratum 768277
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- cortex-a53: Workaround for erratum 819472
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- cortex-a53: Workaround for erratum 824069
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- cortex-a53: Workaround for erratum 827319
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- cortex-a17: Workaround for erratum 852423
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- cortex-a17: Workaround for erratum 852421
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- cortex-a15: Workaround for erratum 816470
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- cortex-a15: Workaround for erratum 827671
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- Documentation
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- Exception Handling Framework documentation
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- Library at ROM (romlib) documentation
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- RAS framework documentation
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- Coding Guidelines document
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- Drivers
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- ccn: Add API for setting and reading node registers
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- Adds ``ccn_read_node_reg`` function
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- Adds ``ccn_write_node_reg`` function
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- partition: Support MBR partition entries
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- scmi: Add ``plat_css_get_scmi_info`` function
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Adds a new API ``plat_css_get_scmi_info`` which lets the platform
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register a platform-specific instance of ``scmi_channel_plat_info_t`` and
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remove the default values
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- tzc380: Add TZC380 TrustZone Controller driver
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- tzc-dmc620: Add driver to manage the TrustZone Controller within the
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DMC-620 Dynamic Memory Controller
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- Library at ROM (romlib)
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- Add platform-specific jump table list
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- Allow patching of romlib functions
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This change allows patching of functions in the romlib. This can be done by
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adding "patch" at the end of the jump table entry for the function that
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needs to be patched in the file jmptbl.i.
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- Library Code
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- Support non-LPAE-enabled MMU tables in AArch32
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- mmio: Add ``mmio_clrsetbits_16`` function
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- 16-bit variant of ``mmio_clrsetbits``
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- object_pool: Add Object Pool Allocator
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- Manages object allocation using a fixed-size static array
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- Adds ``pool_alloc`` and ``pool_alloc_n`` functions
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- Does not provide any functions to free allocated objects (by design)
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- libc: Added ``strlcpy`` function
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- libc: Import ``strrchr`` function from FreeBSD
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- xlat_tables: Add support for ARMv8.4-TTST
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- xlat_tables: Support mapping regions without an explicitly specified VA
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- Math
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- Added softudiv macro to support software division
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- Memory Partitioning And Monitoring (MPAM)
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- Enabled MPAM EL2 traps (``MPAMHCR_EL2`` and ``MPAM_EL2``)
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- Platforms
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- amlogic: Add support for Meson S905 (GXBB)
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- arm/fvp_ve: Add support for FVP Versatile Express platform
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- arm/n1sdp: Add support for Neoverse N1 System Development platform
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- arm/rde1edge: Add support for Neoverse E1 platform
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- arm/rdn1edge: Add support for Neoverse N1 platform
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- arm: Add support for booting directly to Linux without an intermediate
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loader (AArch32)
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- arm/juno: Enable new CPU errata workarounds for A53 and A57
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- arm/juno: Add romlib support
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Building a combined BL1 and ROMLIB binary file with the correct page
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alignment is now supported on the Juno platform. When ``USE_ROMLIB`` is set
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for Juno, it generates the combined file ``bl1_romlib.bin`` which needs to
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be used instead of bl1.bin.
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- intel/stratix: Add support for Intel Stratix 10 SoC FPGA platform
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- marvell: Add support for Armada-37xx SoC platform
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- nxp: Add support for i.MX8M and i.MX7 Warp7 platforms
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- renesas: Add support for R-Car Gen3 platform
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- xilinx: Add support for Versal ACAP platforms
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- Position-Independent Executable (PIE)
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PIE support has initially been added to BL31. The ``ENABLE_PIE`` build flag is
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used to enable or disable this functionality as required.
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- Secure Partition Manager
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- New, SPCI-compliant SPM implementation
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A new version of SPM has been implemented based on draft specifications of
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the SPCI (Secure Partition Client Interface) and SPRT (Secure
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Partition Runtime) specifications.
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The new implementation is a prototype that is expected to undergo intensive
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rework as the specifications change. It has basic support for multiple
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Secure Partitions and Resource Descriptions.
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The old version of SPM, based on MM (ARM Management Mode Interface
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Specification), is still present in the codebase. A new build flag,
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``SPM_MM`` has been added to allow selection of the desired implementation.
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This flag defaults to 1, selecting the MM-based implementation.
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- Security
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- Spectre Variant-1 mitigations (``CVE-2017-5753``)
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- Use Speculation Store Bypass Safe (SSBS) functionality where available
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Provides mitigation against ``CVE-2018-19440`` (Not saving x0 to x3
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registers can leak information from one Normal World SMC client to another)
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Changed
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-------
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- Build System
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- Warning levels are now selectable with ``W=<1,2,3>``
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- Removed unneeded include paths in PLAT_INCLUDES
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- "Warnings as errors" (Werror) can be disabled using ``E=0``
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- Support totally quiet output with ``-s`` flag
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- Support passing options to checkpatch using ``CHECKPATCH_OPTS=<opts>``
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- Invoke host compiler with ``HOSTCC / HOSTCCFLAGS`` instead of ``CC / CFLAGS``
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- Make device tree pre-processing similar to U-boot/Linux by:
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- Creating separate ``CPPFLAGS`` for DT preprocessing so that compiler
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options specific to it can be accommodated.
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- Replacing ``CPP`` with ``PP`` for DT pre-processing
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- CPU Support
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- Errata report function definition is now mandatory for CPU support files
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CPU operation files must now define a ``<name>_errata_report`` function to
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print errata status. This is no longer a weak reference.
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- Documentation
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- Migrated some content from GitHub wiki to ``docs/`` directory
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- Security advisories now have CVE links
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- Updated copyright guidelines
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- Miscellaneous small fixes
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- Drivers
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- console: The ``MULTI_CONSOLE_API`` framework has been rewritten in C
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- console: Ported multi-console driver to AArch32
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- gic: Remove 'lowest priority' constants
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Removed ``GIC_LOWEST_SEC_PRIORITY`` and ``GIC_LOWEST_NS_PRIORITY``.
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Platforms should define these if required, or instead determine the correct
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priority values at runtime.
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- delay_timer: Check that the Generic Timer extension is present
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- mmc: Increase command reply timeout to 10 milliseconds
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- mmc: Poll eMMC device status to ensure ``EXT_CSD`` command completion
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- mmc: Correctly check return code from ``mmc_fill_device_info``
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- External Libraries
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- libfdt: Upgraded from 1.4.2 to 1.4.6-9
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- mbed TLS: Upgraded from 2.12 to 2.16
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This change incorporates fixes for security issues that should be reviewed
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to determine if they are relevant for software implementations using
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Trusted Firmware-A. See the `mbed TLS releases`_ page for details on
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changes from the 2.12 to the 2.16 release.
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- Library Code
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- compiler-rt: Updated ``lshrdi3.c`` and ``int_lib.h`` with changes from
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LLVM master branch (r345645)
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- cpu: Updated macro that checks need for ``CVE-2017-5715`` mitigation
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- libc: Made setjmp and longjmp C standard compliant
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- libc: Allowed overriding the default libc (use ``OVERRIDE_LIBC``)
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- libc: Moved setjmp and longjmp to the ``libc/`` directory
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- Platforms
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- Removed Mbed TLS dependency from plat_bl_common.c
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- arm: Removed unused ``ARM_MAP_BL_ROMLIB`` macro
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- arm: Removed ``ARM_BOARD_OPTIMISE_MEM`` feature and build flag
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- arm: Moved several components into ``drivers/`` directory
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This affects the SDS, SCP, SCPI, MHU and SCMI components
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- arm/juno: Increased maximum BL2 image size to ``0xF000``
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This change was required to accommodate a larger ``libfdt`` library
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- SCMI
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- Optimized bakery locks when hardware-assisted coherency is enabled using the
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``HW_ASSISTED_COHERENCY`` build flag
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- SDEI
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- Added support for unconditionally resuming secure world execution after
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SDEI event processing completes
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SDEI interrupts, although targeting EL3, occur on behalf of the non-secure
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world, and may have higher priority than secure world
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interrupts. Therefore they might preempt secure execution and yield
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execution to the non-secure SDEI handler. Upon completion of SDEI event
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handling, resume secure execution if it was preempted.
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- Translation Tables (XLAT)
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- Dynamically detect need for ``Common not Private (TTBRn_ELx.CnP)`` bit
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Properly handle the case where ``ARMv8.2-TTCNP`` is implemented in a CPU
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that does not implement all mandatory v8.2 features (and so must claim to
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implement a lower architecture version).
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Resolved Issues
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---------------
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- Architecture
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- Incorrect check for SSBS feature detection
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- Unintentional register clobber in AArch32 reset_handler function
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- Build System
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- Dependency issue during DTB image build
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- Incorrect variable expansion in Arm platform makefiles
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- Building on Windows with verbose mode (``V=1``) enabled is broken
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- AArch32 compilation flags is missing ``$(march32-directive)``
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- BL-Specific Issues
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- bl2: ``uintptr_t is not defined`` error when ``BL2_IN_XIP_MEM`` is defined
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- bl2: Missing prototype warning in ``bl2_arch_setup``
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- bl31: Omission of Global Offset Table (GOT) section
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- Code Quality Issues
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- Multiple MISRA compliance issues
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- Potential NULL pointer dereference (Coverity-detected)
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- Drivers
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- mmc: Local declaration of ``scr`` variable causes a cache issue when
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invalidating after the read DMA transfer completes
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- mmc: ``ACMD41`` does not send voltage information during initialization,
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resulting in the command being treated as a query. This prevents the
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command from initializing the controller.
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- mmc: When checking device state using ``mmc_device_state()`` there are no
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retries attempted in the event of an error
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- ccn: Incorrect Region ID calculation for RN-I nodes
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- console: ``Fix MULTI_CONSOLE_API`` when used as a crash console
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- partition: Improper NULL checking in gpt.c
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- partition: Compilation failure in ``VERBOSE`` mode (``V=1``)
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- Library Code
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- common: Incorrect check for Address Authentication support
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- xlat: Fix XLAT_V1 / XLAT_V2 incompatibility
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The file ``arm_xlat_tables.h`` has been renamed to ``xlat_tables_compat.h``
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and has been moved to a common folder. This header can be used to guarantee
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compatibility, as it includes the correct header based on
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``XLAT_TABLES_LIB_V2``.
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- xlat: armclang unused-function warning on ``xlat_clean_dcache_range``
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- xlat: Invalid ``mm_cursor`` checks in ``mmap_add`` and ``mmap_add_ctx``
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- sdei: Missing ``context.h`` header
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- Platforms
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- common: Missing prototype warning for ``plat_log_get_prefix``
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- arm: Insufficient maximum BL33 image size
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- arm: Potential memory corruption during BL2-BL31 transition
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On Arm platforms, the BL2 memory can be overlaid by BL31/BL32. The memory
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descriptors describing the list of executable images are created in BL2
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R/W memory, which could be possibly corrupted later on by BL31/BL32 due
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to overlay. This patch creates a reserved location in SRAM for these
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descriptors and are copied over by BL2 before handing over to next BL
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image.
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- juno: Invalid behaviour when ``CSS_USE_SCMI_SDS_DRIVER`` is not set
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In ``juno_pm.c`` the ``css_scmi_override_pm_ops`` function was used
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regardless of whether the build flag was set. The original behaviour has
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been restored in the case where the build flag is not set.
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- Tools
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- fiptool: Incorrect UUID parsing of blob parameters
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- doimage: Incorrect object rules in Makefile
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Deprecations
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------------
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- Common Code
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- ``plat_crash_console_init`` function
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- ``plat_crash_console_putc`` function
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- ``plat_crash_console_flush`` function
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- ``finish_console_register`` macro
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- AArch64-specific Code
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- helpers: ``get_afflvl_shift``
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- helpers: ``mpidr_mask_lower_afflvls``
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- helpers: ``eret``
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- Secure Partition Manager (SPM)
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- Boot-info structure
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Known Issues
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------------
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- Build System Issues
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- dtb: DTB creation not supported when building on a Windows host.
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This step in the build process is skipped when running on a Windows host. A
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known issue from the 1.6 release.
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- Platform Issues
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- arm/juno: System suspend from Linux does not function as documented in the
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user guide
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Following the instructions provided in the user guide document does not
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result in the platform entering system suspend state as expected. A message
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relating to the hdlcd driver failing to suspend will be emitted on the
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Linux terminal.
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- mediatek/mt6795: This platform does not build in this release
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Trusted Firmware-A - version 2.0
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================================
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@ -1983,3 +2423,5 @@ releases of TF-A.
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.. _OP-TEE Dispatcher: optee-dispatcher.rst
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.. _tf-issue#501: https://github.com/ARM-software/tf-issues/issues/501
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.. _PR#1002: https://github.com/ARM-software/arm-trusted-firmware/pull/1002#issuecomment-312650193
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.. _mbed TLS releases: https://tls.mbed.org/tech-updates/releases
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.. _Firmware Design: firmware-design.rst
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