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fvp: Fix register name in 'plat_print_gic_regs' macro 

The 'plat_print_gic_regs' macro was accessing the GICC_CTLR register
using the GICD_CTLR offset. This still generates the right code in
the end because GICD_CTLR == GICC_CTLR but this patch fixes it for
the logic of the code.

Change-Id: I7b17af50e587f07bec0e4c933e346088470c96f3
This commit is contained in:
Sandrine Bailleux 2014-06-03 09:52:26 +01:00
parent e869310f67
commit 9edc89171f
1 changed files with 1 additions and 1 deletions
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2
plat/fvp/include/plat_macros.S
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@ -47,7 +47,7 @@ gic_regs: .asciz "gic_iar", "gic_ctlr", ""
bl fvp_get_cfgvar
/* gic base address is now in x0 */
ldr w1, [x0, #GICC_IAR]
ldr w2, [x0, #GICD_CTLR]
ldr w2, [x0, #GICC_CTLR]
sub sp, sp, #GIC_REG_SIZE
stp x1, x2, [sp] /* we store the gic registers as 64 bit */
adr x0, gic_regs