From 9f0ddae3175856476b3e0ce1c84bda33b87257e5 Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 26 Mar 2021 04:16:36 -0700 Subject: [PATCH] plat: xilinx: zynqmp: Configure counter frequency during initialization Counter frequency for generic timer of Arm-A53 based Application Processing Unit(APU) is not configuring in case if First Stage Boot Loader(FSBL) does not initialize counter frequency. This happens when FSBL is running from Arm-R5 based Real-time Processing Unit(RPU). Because of that generic timer driver functionality is not working. So configure counter frequency during initialization. Signed-off-by: Rajan Vaja Change-Id: Icfccd59d7d2340fba25ebfb2ef6a813af4290896 --- plat/xilinx/zynqmp/aarch64/zynqmp_common.c | 9 +++++++++ plat/xilinx/zynqmp/include/zynqmp_def.h | 3 +++ 2 files changed, 12 insertions(+) diff --git a/plat/xilinx/zynqmp/aarch64/zynqmp_common.c b/plat/xilinx/zynqmp/aarch64/zynqmp_common.c index 339967c7a..b3365d95a 100644 --- a/plat/xilinx/zynqmp/aarch64/zynqmp_common.c +++ b/plat/xilinx/zynqmp/aarch64/zynqmp_common.c @@ -350,10 +350,19 @@ unsigned int zynqmp_get_bootmode(void) void zynqmp_config_setup(void) { + uint64_t counter_freq; + /* Configure IPI data for ZynqMP */ zynqmp_ipi_config_table_init(); zynqmp_print_platform_name(); + + /* Configure counter frequency */ + counter_freq = read_cntfrq_el0(); + if (counter_freq == ZYNQMP_DEFAULT_COUNTER_FREQ) { + write_cntfrq_el0(plat_get_syscnt_freq2()); + } + generic_delay_timer_init(); } diff --git a/plat/xilinx/zynqmp/include/zynqmp_def.h b/plat/xilinx/zynqmp/include/zynqmp_def.h index f47463000..7e5839136 100644 --- a/plat/xilinx/zynqmp/include/zynqmp_def.h +++ b/plat/xilinx/zynqmp/include/zynqmp_def.h @@ -17,6 +17,9 @@ #define ZYNQMP_CONSOLE_IS(con) (ZYNQMP_CONSOLE_ID_ ## con == ZYNQMP_CONSOLE) +/* Default counter frequency */ +#define ZYNQMP_DEFAULT_COUNTER_FREQ 0U + /* Firmware Image Package */ #define ZYNQMP_PRIMARY_CPU 0